EPM7160SLC84-10 vs EPM7160ELI84-20 Comparación
Comparación detallada lado a lado de EPM7160SLC84-10 por Altera y EPM7160ELI84-20 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7160SLC84-10 | EPM7160ELI84-20 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $35,77 | $11,10 |
| Family | MAX 7000S | — |
| Macrocells | 160 | — |
| Logic Array Blocks (LABs) | 4 | — |
| Maximum User I/O Pins | 64 | — |
| Usable Gates | 3,200 | 3.2K |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Operating Frequency | 100 MHz | 62.5 MHz |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG, 5.0 V) | Yes (IEEE 1149.1 JTAG) |
| Technology | EEPROM-based CMOS | — |
| Encapsulado | 84-Pin PLCC (J-Lead) | 84-Pin PLCC (J-Lead) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | 0C to +70C (Commercial) | -40C to +85C (Industrial grade 'I') |
| JTAG Boundary Scan | Yes (IEEE Std. 1149.1 compliant) | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Not Compliant (per Arrow listing) |
| Series | — | MAX 7000 |
| Device Family | — | MAX 7000 (Complex Programmable Logic Device) |
| Number of Macrocells | — | 160 |
| Number of Logic Array Blocks (LABs) | — | 4 |
| Number of User I/O Pins | — | 64 |
| Pin-to-Pin Propagation Delay (tPD) | — | 20 ns (speed grade '-20') |
| Supply Voltage (VCC) | — | 5.0 V |
| Process Technology | — | CMOS, EEPROM-based configuration |
| Programmable Security | — | Yes (security bit) |
| Configuration Memory | — | Non-volatile EEPROM (instant-on) |