EPM7160SLC84-10N vs EPM7160SLC84-10 Comparación
Comparación detallada lado a lado de EPM7160SLC84-10N por Intel y EPM7160SLC84-10 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7160SLC84-10N | EPM7160SLC84-10 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,85 | $35,77 |
| Family | MAX 7000S | MAX 7000S |
| Logic Elements / Macrocells | 160 macrocells | — |
| Usable Gates | 3,200 gates | 3,200 |
| Logic Array Blocks (LABs) | 4 | 4 |
| User I/O Pins | 64 (also reported as 60 or 36 depending on variant) | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Counter Speed (fCNT) | up to 175.4 MHz | — |
| Maximum Operating Frequency | 100 MHz | 100 MHz |
| Supply Voltage - Core (VCC) | 5.0 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 5.0 V | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programming | Yes, via IEEE Std. 1149.1 JTAG | — |
| Program / Erase Cycles | 100 minimum | — |
| Data Retention | 20 years minimum | — |
| Encapsulado | 84-pin PLCC (J-lead, surface mount) | 84-Pin PLCC (J-Lead) |
| Operating Temperature Grade | Commercial (0C to +70C) | — |
| Lead-Free / RoHS | Yes (-N suffix indicates lead-free) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Macrocells | — | 160 |
| Maximum User I/O Pins | — | 64 |
| Propagation Delay (tPD) | — | 10 ns |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG, 5.0 V) |
| Technology | — | EEPROM-based CMOS |
| Temperatura de funcionamiento | — | 0C to +70C (Commercial) |
| JTAG Boundary Scan | — | Yes (IEEE Std. 1149.1 compliant) |
| Estado RoHS | — | [DATA_NEEDED: RoHS status] |