EPM7160SLC84-6 vs EPM7160ELC84-15 Comparación
Comparación detallada lado a lado de EPM7160SLC84-6 por Intel y EPM7160ELC84-15 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7160SLC84-6 | EPM7160ELC84-15 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $15,86 | $5,95 |
| Family | MAX 7000S | MAX 7000 |
| Device Type | EE PLD (CPLD) | — |
| Macrocells | 160 | 160 |
| Logic Array Blocks (LABs) | 4 (16 macrocells each) | — |
| Usable Gates | 3.2K | 3,200 |
| User I/O Pins | 36 (also reported as 64 depending on source) | — |
| Pin-to-Pin Delay (tPD) | 6 ns (speed grade -6) | — |
| Counter Frequency (fCNT) | 149.3 MHz | — |
| Tensión de alimentación | 4.75 V to 5.25 V (single 5 V supply) | — |
| Process Technology | CMOS EEPROM | — |
| In-System Programmability | Yes (5.0 V ISP via JTAG) | Yes (IEEE 1149.1 JTAG) |
| JTAG Support | IEEE Std. 1149.1 compliant | — |
| MultiVolt I/O | Yes (mixed-voltage interface) | — |
| Encapsulado | 84-pin PLCC (29.31 x 29.31 mm) | — |
| Tipo de montaje | Surface Mount (J-Lead) | Surface Mount (PLCC socket compatible) |
| Temperatura de funcionamiento | [DATA_NEEDED: commercial vs industrial grade] | 0 C to +70 C (commercial) |
| Estado RoHS | Compliant | Contains lead / RoHS non-compliant (per Altera listing) |
| Product Type | — | CPLD - Complex Programmable Logic Device |
| Architecture | — | EEPROM-based, second-generation MAX |
| Logic Array Blocks | — | 4 |
| Maximum I/O Pins | — | 36 |
| Pin-to-Pin Delay | — | 15 ns |
| Counter Frequency | — | 76.9 MHz |
| Supply Voltage (Vcc) | — | 5 V |
| Package Type | — | 84-pin PLCC (J-Lead) |