EPM7256AEFC100-10N vs EPM7256AETC100-7N Comparación
Comparación detallada lado a lado de EPM7256AEFC100-10N por Altera y EPM7256AETC100-7N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPM7256AEFC100-10N - MAX 7000 CPLD, 256 Macro, 10ns, 100-FBGA | Altera
EPM7256AEFC100-10N NrndIntel
EPM7256AETC100-7N - 256-Macrocell MAX 7000A CPLD, 3.3V, 100TQFP | Intel
EPM7256AETC100-7N NrndComparación de especificaciones
| Parámetro | EPM7256AEFC100-10N | EPM7256AETC100-7N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $24,50 | $48,75 |
| Manufacturer | Altera (now Intel) | — |
| Series | MAX 7000A | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 256 | — |
| Logic Array Blocks (LABs) | 16 | — |
| User I/O | 84 | — |
| Number of Gates | 5000 | 5000 |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Frequency (fMAX) | 154.8 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Tolerance | 5 V tolerant (multiVolt I/O) | — |
| Programmability | EEPROM, In-System Programmable (JTAG IEEE 1149.1) | — |
| Encapsulado | 100-LBGA (11 x 11 mm), FineLine BGA | 100-pin TQFP (14 x 14 mm) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | 0°C to +70°C (commercial) | 0 C to 70 C (Commercial) |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Process Technology | 0.30 µm EEPROM CMOS | — |
| Programmable Type | — | In System Programmable (ISP) |
| Number of Macrocells | — | 256 |
| Number of Logic Elements/Blocks | — | 16 |
| Number of User I/Os | — | 84 |
| Propagation Delay tPD (max) | — | 7.5 ns |
| Maximum Frequency fCNT | — | 126.6 MHz |
| Supply Voltage - Internal | — | 3.0 V to 3.6 V |
| Technology | — | CMOS, EEPROM-based |
| Programming Interface | — | IEEE 1149.1 (JTAG) |