EPM7256AEFC100-7 vs EPM7256AETC100-7 Comparación
Comparación detallada lado a lado de EPM7256AEFC100-7 por Intel y EPM7256AETC100-7 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM7256AETC100-7 - 256-Macrocell MAX 7000A CPLD, 7.5ns TQFP-100 | Intel
EPM7256AETC100-7 ObsoleteComparación de especificaciones
| Parámetro | EPM7256AEFC100-7 | EPM7256AETC100-7 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $15,20 | $10,45 |
| Family | MAX 7000A | MAX 7000A |
| Macro Cells | 256 | — |
| Usable Gates | 5,000 | 5,000 |
| Logic Array Blocks | 16 | — |
| User I/Os | 84 | — |
| Encapsulado | 100-pin FBGA (11x11 mm) | TQFP-100 (ET100) |
| Recuento de pines | 100 | — |
| Supply Voltage - VCCINT | 3.0 V to 3.6 V | — |
| Supply Voltage - VCCIO | 2.5 V, 3.3 V, or 5 V (MultiVolt) | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Internal Toggle Rate | 250 MHz | — |
| Maximum Operating Frequency | 126.6 MHz | 126.6 MHz |
| Programmable Type | In-System Programmable (EEPROM) | — |
| Programming Interface | IEEE 1149.1 JTAG | JTAG (IEEE 1149.1) - In-System Programmable |
| Tipo de montaje | Surface Mount (FBGA) | Surface Mount |
| Temperatura de funcionamiento | 0C to +90C (commercial) | 0C to +70C (Commercial) |
| Estado RoHS | [DATA_NEEDED: rohs status] | Unknown - part marked obsolete |
| Nivel MSL | [DATA_NEEDED: msl level] | — |
| Series | — | EPM7256 |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Technology | — | EEPROM-based, CMOS |
| Macrocells | — | 256 |
| Number of I/Os | — | 84 |
| Number of Logic Array Blocks (LABs) | — | 16 |
| Core Supply Voltage | — | 3.3 V |
| Pin-to-Pin Delay (tPD) | — | 7.5 ns |
| Tipo de memoria | — | EEPROM (non-volatile) |