EPM7256AEQC208-5N vs EPM7256AEQI208-7N Comparación
Comparación detallada lado a lado de EPM7256AEQC208-5N por Altera y EPM7256AEQI208-7N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7256AEQC208-5N | EPM7256AEQI208-7N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $11,50 | $0,00 |
| Family | MAX 7000A | MAX 7000A |
| Logic Family / Base Technology | CMOS, EEPROM-based | — |
| Usable Gates | 5,000 | 5,000 |
| Macrocells | 256 | 256 |
| User I/Os | 164 | — |
| Dedicated Inputs | 16 | — |
| Número de pines | 208 | — |
| Encapsulado | 208-pin PQFP (Plastic Quad Flat Pack) | 208-pin PQFP (FQFP) |
| Supply Voltage (VCCINT) | 3.3 V | — |
| Maximum Internal Frequency | 172.4 MHz | 126.6 MHz |
| Pin-to-Pin Propagation Delay (tPD) | 5.5 ns | 7.5 ns |
| Speed Grade | -5 | -7 |
| Temperatura de funcionamiento | 0 C to +70 C (Commercial) | — |
| Programming Interface | JTAG (IEEE Std. 1149.1) / ISP | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | unknown | Compliant (N suffix) |
| Nivel MSL | [DATA_NEEDED: MSL Level] | — |
| User I/O Pins | — | 164 |
| Logic Array Blocks | — | 16 |
| Tensión de alimentación | — | 3.3 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| Number of Terminals | — | 208 |
| Terminal Form | — | Gull Wing |
| Package Shape | — | Square |
| Operating Temperature Grade | — | Industrial |
| Lead Finish | — | [DATA_NEEDED: lead finish] |