EPM7256AEQI208-7N vs EPM7256AEFI100-7 Comparación
Comparación detallada lado a lado de EPM7256AEQI208-7N por Altera y EPM7256AEFI100-7 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7256AEQI208-7N | EPM7256AEFI100-7 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,00 | $65,40 |
| Family | MAX 7000A | — |
| Macrocells | 256 | — |
| Usable Gates | 5,000 | — |
| User I/O Pins | 164 | — |
| Logic Array Blocks | 16 | — |
| Pin-to-Pin Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Internal Frequency | 126.6 MHz | — |
| Tensión de alimentación | 3.3 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| Encapsulado | 208-pin PQFP (FQFP) | 100-ball FBGA (FineLine BGA), 11x11 mm |
| Number of Terminals | 208 | — |
| Terminal Form | Gull Wing | — |
| Package Shape | Square | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Operating Temperature Grade | Industrial | — |
| Speed Grade | -7 | — |
| Estado RoHS | Compliant (N suffix) | Not Compliant (per Arrow listing) |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| Logic Family | — | MAX 7000A |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Number of Macrocells | — | 256 |
| Number of Usable Gates | — | 5K |
| Number of User I/O | — | 84 |
| Pin-to-Pin Delay (Speed Grade) | — | 7.5 ns |
| Maximum Operating Frequency | — | 126.6 MHz |
| Core Supply Voltage | — | 3.3 V |
| MultiVolt I/O Support | — | 2.5 V / 3.3 V / 5.0 V |
| Programmability | — | In-system programmable (ISP) via JTAG |
| Operating Temperature Range (Industrial) | — | -40 C to +85 C |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |