EPM7256AETC144-10 vs EPM7256ATI144-10N Comparación
Comparación detallada lado a lado de EPM7256AETC144-10 por Intel y EPM7256ATI144-10N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM7256AETC144-10 - MAX 7000A 256-Macrocell CPLD, 10ns, TQFP-144 | Intel
EPM7256AETC144-10 ObsoleteAltera
EPM7256ATI144-10N - 256-Macrocell MAX 7000A CPLD, 144-TQFP | Altera
EPM7256ATI144-10N ⚠ Última compraComparación de especificaciones
| Parámetro | EPM7256AETC144-10 | EPM7256ATI144-10N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $31,40 | $30,10 |
| Family | MAX 7000A | MAX 7000A |
| Series | EPM7256AE | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 256 | — |
| Usable Gates | 5,000 | 5,000 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/Os | 36 | — |
| Dedicated Inputs | 16 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Operating Frequency (fMAX) | 95.2 MHz | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V (5.0 V tolerant inputs on A-series) | — |
| Encapsulado | 144-pin TQFP (TQFP-144) | TQFP-144 |
| Temperatura de funcionamiento | 0C to +70C (commercial) | -40C to +85C (industrial) |
| Programming Interface | JTAG (IEEE 1149.1) + Fast Passive Serial | — |
| Non-Volatile Memory | EEPROM-based | — |
| Estado RoHS | [DATA_NEEDED: rohs_status] | [DATA_NEEDED: RoHS compliance per datasheet] |
| Macrocells | — | 256 |
| User I/O Pins | — | [DATA_NEEDED: I/O count for 144-pin TQFP variant] |
| Pin-to-Pin Delay | — | 10 ns |
| Maximum Internal Frequency | — | 93.5 MHz |
| Supply Voltage VCCINT | — | 3.3 V |
| MultiVolt I/O Voltage VCCIO | — | 2.5 V or 3.3 V |
| Programming Method | — | IEEE Std. 1149.1 JTAG (ISP) |
| Non-volatile Configuration | — | Yes (EEPROM) |