EPM7256EQC160-12 vs EPM7256EGC192-12 Comparación
Comparación detallada lado a lado de EPM7256EQC160-12 por Intel y EPM7256EGC192-12 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7256EQC160-12 | EPM7256EGC192-12 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $17,10 | $17,85 |
| Family | MAX 7000 | MAX 7000 |
| Programmable Type | EE PLD (CPLD, in-system programmable EEPROM) | — |
| Number of Macrocells | 256 | — |
| Number of Logic Blocks / LABs | 16 | — |
| Number of Gates | 5,000 usable gates | — |
| Number of I/O Pins | 132 | — |
| Propagation Delay tPD (max) | 12 ns | — |
| Maximum Operating Frequency | 90.9 MHz | 90.9 MHz |
| Supply Voltage VCCINT | 4.75 V to 5.25 V | — |
| I/O Standard | 5 V TTL, 3.3 V compatible | — |
| Temperatura de funcionamiento | 0 °C to 70 °C (Commercial) | 0C to +70C (commercial) |
| Encapsulado / Carcasa | 160-pin PQFP (28 × 28 mm) | — |
| Tipo de montaje | Surface Mount | Through Hole (PGA socket) |
| Process Technology | CMOS EEPROM | — |
| Programming Interface | JTAG (IEEE 1532 / IEEE 1149.1) | — |
| Estado RoHS | Compliant (lead-free PQFP) | Compliant |
| Estado del ciclo de vida | Obsolete | — |
| Device Logic Cells | — | 256 macrocells |
| Usable Gates | — | 5,000 |
| Propagation Delay (tPD) | — | 12 ns |
| User I/O Pins | — | 164 |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V (5 V nominal) |
| Encapsulado | — | 192-pin CPGA (Ceramic Pin Grid Array) |
| Technology | — | CMOS, EEPROM-based |
| Programmable Interface | — | JTAG (IEEE 1149.1) / ISP |
| Logic Blocks (LABs) | — | 16 |
| Macrocells per LAB | — | 16 |
| Lead-Free | — | Yes |
| JEDEC Package Code | — | S-CPGA-P192 |