EPM7256SQC208-15 vs EPM7256SRC208-7 Comparación
Comparación detallada lado a lado de EPM7256SQC208-15 por Altera y EPM7256SRC208-7 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7256SQC208-15 | EPM7256SRC208-7 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $3,65 | $0,00 |
| Family | MAX 7000S | MAX 7000S |
| Series | EPM7256 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Macrocells | 256 | 256 |
| Logic Array Blocks (LABs) | 16 | — |
| Usable Gates | 5000 | 5,000 |
| User I/O Pins | 164 | 164 |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| Rango de temperatura de funcionamiento | 0 C to +70 C (Commercial) | — |
| Encapsulado | 208-pin PQFP (28x28 mm) | 208-pin RQFP (PowerQuad Flat Pack) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programmable Power Mode | Yes (per-macrocell turbo-bit) | — |
| JTAG (IEEE 1149.1) Boundary-Scan | Yes | — |
| In-System Programmability (ISP) | Yes | — |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile) |
| Estado RoHS | Contains lead / RoHS non-compliant (per third-party listing) | [DATA_NEEDED: RoHS status] |
| Lead-Free Status | Contains lead | — |
| Pin-to-Pin Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency (fMAX) | — | 128.2 MHz |
| Supply Voltage (VCCINT/VCCIO) | — | 5 V |
| Package Code | — | FQFP |
| Terminal Form | — | Gull Wing |
| Number of Terminals | — | 208 |
| Operating Temperature Grade | — | Commercial (0C to +70C) |
| Speed Grade | — | -7 (fastest standard grade) |
| Packaging | — | Tray |