EPM7256SRI208-10 vs EPM7256SRC208-10N Comparación
Comparación detallada lado a lado de EPM7256SRI208-10 por Intel y EPM7256SRC208-10N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7256SRI208-10 | EPM7256SRC208-10N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $27,20 | $27,20 |
| Logic Family | MAX 7000S (EEPROM-based CPLD) | — |
| Macrocells | 256 | 256 |
| Logic Array Blocks | 16 | — |
| Usable Gates | 5,000 | 5,000 |
| User I/O Pins | 164 | 164 |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Maximum Internal Frequency | 100 MHz | — |
| Supply Voltage (Internal) | 4.5 V to 5.5 V | — |
| Logic Family Technology | CMOS | — |
| Programmable Type | In-System Programmable (ISP) via JTAG | — |
| Encapsulado | 208-pin RQFP (PowerQuad) | 208-pin RQFP (PowerQuad Flat Pack) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Rango de temperatura de funcionamiento | Industrial (-40C to +85C) | — |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile) |
| JTAG Boundary Scan | Yes (BST circuitry) | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Compliant (N suffix = lead-free) |
| Packaging | Tray | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Family | — | MAX 7000S |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 100 MHz |
| Tensión de alimentación | — | 5.0 V |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Temperatura de funcionamiento | — | 0C to +70C (commercial) |
| Logic Levels | — | 5.0 V TTL/CMOS compatible |
| Number of Logic Array Blocks | — | [DATA_NEEDED: number of LABs] |
| Maximum User Flash Memory | — | [DATA_NEEDED: user flash memory] |