EPM9320RC208-20 vs EPM9480RC208-15 Comparación
Comparación detallada lado a lado de EPM9320RC208-20 por Altera y EPM9480RC208-15 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM9320RC208-20 | EPM9480RC208-15 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $21,90 | $24,95 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 320 | — |
| Logic Array Blocks (LABs) | 20 | — |
| Usable Gates | 6,000 | 10,000 gates |
| Maximum I/O Pins | 132 | — |
| Propagation Delay (tPD max) | 20 ns | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V | — |
| Programming Technology | EEPROM, in-system programmable (ISP) | — |
| Boundary-Scan Interface | IEEE Std. 1149.1 (JTAG) | — |
| Temperatura de funcionamiento | 0 °C to 70 °C (commercial) | -40C to +85C (commercial) |
| Encapsulado | 208-RQFP, exposed pad (208-BFQFP) | RQFP-208 |
| Tipo de montaje | Surface Mount | Surface Mount |
| Architecture | Multiple Array Matrix (MAX), 3rd generation | Multiple Array MatriX (MAX) - 3rd generation |
| Process Technology | CMOS, 5.0 V EEPROM | — |
| Reprogrammability | Yes, unlimited ISP cycles | — |
| Logic Cells / Macro Cells | — | 480 macro cells |
| Maximum Operating Frequency | — | 117.6 MHz |
| Propagation Delay (tPD) | — | 15 ns |
| User I/O Pins | — | 153 |
| Tensión de alimentación | — | 5.0 V |
| Programmability | — | In-System (ISP) via JTAG IEEE 1149.1 |
| Configuration Memory | — | EEPROM (non-volatile) |
| Estado RoHS | — | [DATA_NEEDED: RoHS compliance status] |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |