EPM9400RC208-20 vs EPM9320RC208-20N Comparación
Comparación detallada lado a lado de EPM9400RC208-20 por Altera y EPM9320RC208-20N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM9400RC208-20 | EPM9320RC208-20N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $60,49 | $0,00 |
| Family | MAX 9000 | — |
| Programmable Type | In System Programmable (ISP) | — |
| Macro Cells | 400 | 320 |
| Usable Gates | 8,000 | 6,000 |
| Pin-to-Pin Propagation Delay | 20 ns | — |
| Maximum Operating Frequency | 100 MHz | 100 MHz |
| Supply Voltage (Internal) | 4.75 V to 5.25 V | — |
| Configuration Technology | EEPROM-based (non-volatile) | — |
| JTAG Interface | IEEE Std. 1149.1 | — |
| Encapsulado | 208-pin RQFP (28x28 mm) | 208-pin RQFP (PowerQuad II) |
| Supplier Device Package | 208-RQFP | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Number of I/O Pins | [DATA_NEEDED: user I/O count] | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Nivel MSL | [DATA_NEEDED: moisture sensitivity level] | [DATA_NEEDED: MSL level] |
| Speed Grade | -20 (20 ns) | — |
| Device Family | — | MAX 9000 |
| Logic Type | — | Complex Programmable Logic Device (CPLD) |
| Logic Array Blocks | — | 20 |
| Maximum Pin-to-Pin Delay (tPD) | — | 20 ns |
| Tensión de alimentación | — | 5.0 V |
| Configuration Memory | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| User I/O Pins | — | 168 |
| Lead Finish | — | [DATA_NEEDED: lead finish] |