EPM9480RC208-15N vs EPM9560RC208-15N Comparación
Comparación detallada lado a lado de EPM9480RC208-15N por Altera y EPM9560RC208-15N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM9560RC208-15N - 560-Macrocell MAX 9000 CPLD, 15ns, 208-RQFP
EPM9560RC208-15N ⚠ Última compraComparación de especificaciones
| Parámetro | EPM9480RC208-15N | EPM9560RC208-15N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,00 | $19,85 |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 10,000 | 12,000 |
| Macro Cells | 480 | — |
| Maximum Frequency | 117.6 MHz | — |
| Propagation Delay | 15 ns (speed grade -15) | — |
| Tensión de alimentación | 5.0 V | — |
| Encapsulado | 208-pin RQFP | 208-pin RQFP (Power Quad Flat Pack) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | CMOS EEPROM (non-volatile) |
| In-System Programmability | Yes (ISP via JTAG) | — |
| JTAG Interface | IEEE Std. 1149.1 | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Estado RoHS | ROHS3 Compliant | [DATA_NEEDED: check part marking suffix for lead-free/RoHS] |
| Moisture Sensitivity Level | MSL 3 (168 Hours) | — |
| Manufacturer Standard Lead Time | 1-7 Days | — |
| Architecture | Multiple Array MatriX (MAX) third-generation | Multiple Array MatriX (MAX) - third generation |
| Series | — | MAX 9000 |
| Macrocells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 |
| User I/O | — | 212 (in 208-RQFP, see family datasheet) |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Maximum Internal Frequency | — | 117.6 MHz |
| Supply Voltage (VCCINT) | — | 5.0 V |
| Programmability | — | In-system via IEEE 1149.1 JTAG |
| Operating Temperature (commercial) | — | 0C to +70C |
| Speed Grade | — | -15 (15 ns tPD) |