EPM9480RC208-20 vs EPM9320RC208-20 Comparación
Comparación detallada lado a lado de EPM9480RC208-20 por Intel y EPM9320RC208-20 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM9480RC208-20 | EPM9320RC208-20 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $22,10 | $21,90 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 12,000 | 6,000 |
| Macro Cells | 560 | — |
| Logic Array Blocks (LABs) | 16 | 20 |
| Pin-to-Pin Delay | 20 ns | — |
| Maximum Operating Frequency | 117.6 MHz | — |
| Tensión de alimentación | 5 V | — |
| Technology | CMOS EEPROM (non-volatile) | — |
| Encapsulado | 208-pin RQFP (Plastic Quad Flat Pack) | 208-RQFP, exposed pad (208-BFQFP) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ByteBlaster | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature grade] | 0 °C to 70 °C (commercial) |
| I/O Pins | [DATA_NEEDED: user I/O count] | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Macrocells | — | 320 |
| Maximum I/O Pins | — | 132 |
| Propagation Delay (tPD max) | — | 20 ns |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| Programming Technology | — | EEPROM, in-system programmable (ISP) |
| Boundary-Scan Interface | — | IEEE Std. 1149.1 (JTAG) |
| Architecture | — | Multiple Array Matrix (MAX), 3rd generation |
| Process Technology | — | CMOS, 5.0 V EEPROM |
| Reprogrammability | — | Yes, unlimited ISP cycles |