EPM9480RC208-20 vs EPM9480RC208-15N Comparación
Comparación detallada lado a lado de EPM9480RC208-20 por Intel y EPM9480RC208-15N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM9480RC208-20 | EPM9480RC208-15N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $22,10 | $0,00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 12,000 | 10,000 |
| Macro Cells | 560 | 480 |
| Logic Array Blocks (LABs) | 16 | — |
| Pin-to-Pin Delay | 20 ns | — |
| Maximum Operating Frequency | 117.6 MHz | — |
| Tensión de alimentación | 5 V | 5.0 V |
| Technology | CMOS EEPROM (non-volatile) | — |
| Encapsulado | 208-pin RQFP (Plastic Quad Flat Pack) | 208-pin RQFP |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ByteBlaster | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature grade] | [DATA_NEEDED: operating temperature range] |
| I/O Pins | [DATA_NEEDED: user I/O count] | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | ROHS3 Compliant |
| Maximum Frequency | — | 117.6 MHz |
| Propagation Delay | — | 15 ns (speed grade -15) |
| Configuration Memory | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes (ISP via JTAG) |
| JTAG Interface | — | IEEE Std. 1149.1 |
| Moisture Sensitivity Level | — | MSL 3 (168 Hours) |
| Manufacturer Standard Lead Time | — | 1-7 Days |
| Architecture | — | Multiple Array MatriX (MAX) third-generation |