EPM9560ARC240-10N vs EPM9560ARI240-10N Comparación
Comparación detallada lado a lado de EPM9560ARC240-10N por Altera y EPM9560ARI240-10N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPM9560ARC240-10N - MAX 9000 CPLD 560 Macro 191 IOs | Altera/Intel
EPM9560ARC240-10N ObsoleteIntel
EPM9560ARI240-10N - MAX 9000 CPLD, 560 Macrocells, 5V, 240-RQFP | Intel
EPM9560ARI240-10N NrndComparación de especificaciones
| Parámetro | EPM9560ARC240-10N | EPM9560ARI240-10N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $19,50 | $105,00 |
| Logic Family | MAX 9000 (CPLD) | CMOS, EEPROM-based |
| Process Technology | CMOS EEPROM | — |
| Macro Cells | 560 | — |
| User I/Os | 191 | 216 (per digchip); 191 (per Mouser) |
| Logic Array Blocks (LABs) | 16 | 16 |
| Propagation Delay (tPD) | 10 ns | 10 ns (-10 speed grade) |
| Internal Frequency (fMAX) | 145 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| Temperatura de funcionamiento | 0°C to +70°C (Commercial) | -40C to +85C (industrial) |
| Encapsulado | 240-pin RQFP (32x32 mm) | 240-pin RQFP (RQFP-240 / PQFP-240) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programming Interface | IEEE 1149.1 JTAG / ByteBlaster | — |
| Programmability | In-system, EEPROM-based (non-volatile) | — |
| I/O Standard | 5.0 V TTL-compatible | — |
| Estado RoHS | Non-RoHS (legacy Altera part) | — |
| Family | MAX 9000 | MAX 9000 |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 12,000 |
| Macrocells | — | 560 |
| Maximum Internal Frequency | — | 144.9 MHz (typical); 145 MHz (per digchip) |
| Tensión de alimentación | — | 5.0 V nominal (4.5 V min, 5.5 V max) |
| In-System Programmability | — | Yes (5.0 V ISP via JTAG) |
| Architecture | — | Multiple Array MatriX (MAX) - 3rd generation |
| JTAG (IEEE 1149.1) | — | Yes |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free / RoHS status not in provided data] |