EPM9560GC280-15N vs EPM9560GI280-15 Comparación
Comparación detallada lado a lado de EPM9560GC280-15N por Intel y EPM9560GI280-15 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM9560GC280-15N | EPM9560GI280-15 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $125,00 | $110,00 |
| Device Family | MAX 9000 | MAX 9000 |
| Product Type | EE PLD / CPLD | — |
| Macrocell Count | 560 | — |
| Usable Gates | 12,000 (typical) | — |
| Propagation Delay (tPD) | 16.6 ns | 11.4 ns |
| Frecuencia de reloj máxima | 117.6 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | 4.5 V to 5.5 V (3.3 V or 5 V I/O) |
| Maximum Supply Voltage | 5.25 V | — |
| Logic Technology | CMOS EEPROM | — |
| In-System Programmability | Yes (5.0-V ISP via JTAG) | 5.0-V ISP via JTAG |
| Boundary-Scan (JTAG) | IEEE Std. 1149.1 compliant | — |
| Encapsulado | CPGA-280 (Ceramic Pin Grid Array, 280 pins) | 280-pin PGA (ceramic, metal-sealed cofired) |
| Package Code | PGA / CPGA280 | — |
| Terminal Form | PIN/PEG | — |
| Operating Temperature Grade | Commercial | — |
| Architecture | Multiple Array MatriX (MAX) 3rd generation | CMOS EEPROM, third-generation Multiple Array MatriX (MAX) |
| Macrocells | — | 560 |
| Flip-Flops | — | 772 |
| User I/Os | — | 216 |
| Dedicated Inputs | — | 12 |
| Logic Elements / Gates | — | 12,000 usable gates |
| Internal Frequency (fMAX) | — | 145 MHz |
| Clock-to-Output (tCO) | — | 16.6 ns |
| Temperatura de funcionamiento | — | -40 °C to 85 °C (industrial) |
| Process Technology | — | CMOS EEPROM |
| Estado RoHS | — | [DATA_NEEDED: RoHS status] |
| Nivel de sensibilidad a la humedad (MSL) | — | MSL-3 (168 hours) |