EPM9560RC-15 vs EPM9560ARI240-10 Comparación
Comparación detallada lado a lado de EPM9560RC-15 por Altera y EPM9560ARI240-10 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPM9560RC-15 - 560-Macrocell MAX 9000 CPLD, 15ns, 240-RQFP | Altera / Intel
EPM9560RC-15 ⚠ Última compraComparación de especificaciones
| Parámetro | EPM9560RC-15 | EPM9560ARI240-10 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $30,10 | $0,00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 (40 macrocells each) | — |
| Maximum User I/O Pins | 191 | — |
| Pin-to-Pin Delay (tPD1) | 15 ns | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5.0 V nominal) | — |
| Temperatura de funcionamiento | 0 C to +70 C (commercial) | — |
| Encapsulado | 240-pin RQFP (32x32 mm) | 240-pin RQFP (PowerQuad Flat Pack) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programming Interface | IEEE Std. 1149.1 JTAG (ISP) | — |
| Process Technology | CMOS EEPROM | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| In-System Programmability | Yes (5.0 V ISP via JTAG) | — |
| Macro Cells | — | 560 |
| User I/O Pins | — | 191 |
| Pin-to-Pin Propagation Delay | — | 10 ns |
| Internal Frequency | — | 144.9 MHz |
| Tensión de alimentación | — | 5.0 V |
| Technology | — | CMOS, EEPROM-based configuration |
| Rango de temperatura de funcionamiento | — | -40 C to +85 C (industrial) |
| Configuration Memory | — | EEPROM (non-volatile, instant-on) |
| Logic Architecture | — | Multiple Array MatriX (MAX) with global interconnect array |
| Moisture Sensitivity Level | — | [DATA_NEEDED: MSL level] |
| Number of Terminals | — | 240 |
| Terminal Form | — | Gull Wing |