EPM9560RC208-16 vs EPM9560ARC208-10 Comparación
Comparación detallada lado a lado de EPM9560RC208-16 por Intel y EPM9560ARC208-10 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM9560RC208-16 - MAX 9000 CPLD, 560 Macrocells, 208-RQFP | Intel / Altera
EPM9560RC208-16 NrndComparación de especificaciones
| Parámetro | EPM9560RC208-16 | EPM9560ARC208-10 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $52,40 | $0,00 |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Elements / Macrocells | 560 macrocells | — |
| Typical Gates | 12,000 gates | — |
| Usable Gates | 12,000 (typical) | 12,000 gates |
| Pin-to-Pin Delay (tPD) | 16 ns | — |
| Maximum Internal Frequency (fMAX) | 117.6 MHz | — |
| Supply Voltage (VCCINT / VCCIO) | 5 V | — |
| User I/O Pins | 416 | 153 I/O |
| Encapsulado | 208-pin Power Quad Flat Pack (RQFP) | 208-pin RQFP (PowerQuad Flat Pack) with exposed pad |
| Tipo de montaje | Surface Mount | Surface Mount |
| Process Technology | 0.35 µm CMOS EEPROM | — |
| Programmability | In-system via JTAG (IEEE 1149.1) | — |
| Temperatura de funcionamiento | [DATA_NEEDED: industrial/commercial temperature grade] | 0 C to +70 C (commercial) |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Speed Grade | -16 | — |
| Device Family | — | MAX 9000A (Multiple Array MatriX) |
| Programmable Logic Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 560 macrocells |
| Logic Array Blocks | — | 35 LABs |
| Propagation Delay (tPD) | — | 10 ns (speed grade -10) |
| Internal Frequency | — | 144.9 MHz |
| Tensión de alimentación | — | 5.0 V |
| Logic Family | — | CMOS |
| Configuration Technology | — | EEPROM (non-volatile, in-system programmable) |
| JTAG Interface | — | IEEE 1149.1 boundary-scan (ISP) |
| Recuento de pines | — | 208 pins |