EPM9560RC304-10 vs EPM9560RC304-15F Comparación
Comparación detallada lado a lado de EPM9560RC304-10 por Intel y EPM9560RC304-15F por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPM9560RC304-15F - 560-Macrocell MAX 9000 CPLD, 5V, RQFP-304 | Intel
EPM9560RC304-15F ObsoleteComparación de especificaciones
| Parámetro | EPM9560RC304-10 | EPM9560RC304-15F |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $17,60 | $18,75 |
| Family | MAX 9000 | — |
| Device Type | CPLD / EPLD | — |
| Macrocells | 560 | 560 |
| Usable Gates | 16000 | 12,000 |
| Logic Elements | 560 | — |
| Encapsulado | RQFP-304 (RC) | RQFP-304 (304-pin Plastic QFP) |
| Recuento de pines | 304 | — |
| Pin-to-Pin Propagation Delay | 12 ns | — |
| Speed Grade | -10 | — |
| Tensión de alimentación | 5 V | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial) |
| User I/O Pins | 304 (package-limited) | 212 |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | — |
| Programming Method | JTAG in-system (ISP) | — |
| Process Technology | 0.65 µm CMOS EEPROM | High-performance CMOS, EEPROM-based |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | 3 (168 Hours) | 3 (168 hours) |
| Estado RoHS | ROHS3 Compliant | [DATA_NEEDED: rohs status - not stated in source] |
| Device Family | — | MAX 9000 |
| Series | — | EPM9560 |
| Propagation Delay (tpd) | — | 16.6 ns (max) |
| Maximum Internal Frequency | — | 117.6 MHz |
| Core Supply Voltage | — | 5.0 V |
| Dedicated Inputs | — | 4 |
| Logic Array Blocks (LABs) | — | 16 (40 macrocells each) |
| Programming Technology | — | 5.0 V in-system EEPROM via JTAG (IEEE 1149.1) |
| Architecture | — | Multiple Array MatriX (MAX) with PIA interconnect |
| Boundary Scan Test (BST) | — | Yes, JTAG-compliant |