EPM9560RC304-5 vs EPM9560RC304-10 Comparación
Comparación detallada lado a lado de EPM9560RC304-5 por Altera y EPM9560RC304-10 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM9560RC304-5 | EPM9560RC304-10 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,00 | $17,60 |
| Device Family | MAX 9000 (EPM9560) | — |
| Device Type | Complex Programmable Logic Device (CPLD) / EPLD | CPLD / EPLD |
| Usable Gates | 12,000 | 16000 |
| Macrocells | 560 | 560 |
| Maximum Operating Frequency | 117.6 MHz (family -15 grade reference) | — |
| Tensión de alimentación | 5.0 V | 5 V |
| Speed Grade | -5 (fastest grade in family) | -10 |
| Encapsulado | 304-pin RQFP (PowerQuad II) | RQFP-304 (RC) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG ISP) | — |
| Nivel de sensibilidad a la humedad (MSL) | 3 (168 Hours) | — |
| Estado RoHS | ROHS3 Compliant | ROHS3 Compliant |
| Manufacturer Standard Lead Time | 1-7 Days (distributor listing) | — |
| Rango de temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Number of I/O Pins | [DATA_NEEDED: number of user I/O pins] | — |
| Propagation Delay (tPD) | [DATA_NEEDED: propagation delay] | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: number of LABs] | — |
| Family | — | MAX 9000 |
| Logic Elements | — | 560 |
| Recuento de pines | — | 304 |
| Pin-to-Pin Propagation Delay | — | 12 ns |
| Temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature range] |
| User I/O Pins | — | 304 (package-limited) |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |
| Programming Method | — | JTAG in-system (ISP) |
| Process Technology | — | 0.65 µm CMOS EEPROM |
| Nivel MSL | — | 3 (168 Hours) |