EPM9560RI208-20 vs EPM9560RI208-20N Comparación
Comparación detallada lado a lado de EPM9560RI208-20 por Intel y EPM9560RI208-20N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM9560RI208-20 | EPM9560RI208-20N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $21,10 | $0,00 |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Usable Gates | 12,000 | 12,000 |
| Macro Cells | 560 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O Pins | 212 | — |
| Pin-to-Pin Propagation Delay (tPD) | 20 ns | — |
| Counter Frequency (fCNT) | 100 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Process Technology | CMOS EEPROM | — |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | Yes, via IEEE Std. 1149.1 JTAG |
| Encapsulado | 208-pin RQFP (Power-Quad Flat Pack) 28x28 mm | 208-pin RQFP |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range grade] | Industrial (-40C to +85C) |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Tipo de montaje | Surface Mount | Surface Mount |
| Device Family | — | MAX 9000 |
| Macrocells | — | 560 |
| Pin-to-Pin Delay | — | 20 ns (-20 speed grade) |
| Counter Speed | — | 100 MHz |
| Tensión de alimentación | — | 5.0 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| Development Tool | — | MAX+PLUS II |
| Design Entry | — | Schematic, VHDL, Verilog HDL, AHDL |
| Packaging | — | Tray |
| Logic Architecture | — | Third-generation MAX (Multiple Array MatriX) |
| Fabrication Process | — | Advanced CMOS |