EPM9560RI208-20W vs EPM9560RI208-10N Comparación
Comparación detallada lado a lado de EPM9560RI208-20W por Intel y EPM9560RI208-10N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM9560RI208-20W | EPM9560RI208-10N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $48,75 | $61,75 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | — |
| Logic Array Blocks (LABs) | 16 LABs of 40 macrocells each | — |
| User I/O Pins | 212 | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Counter Frequency (fCNT) | 100 MHz | — |
| Speed Grade | -20 | — |
| Tensión de alimentación | 5.0 V | 5 V |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Programming Technology | CMOS EEPROM | — |
| Encapsulado | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (PQFP) |
| Temperatura de funcionamiento | -40C to +85C (Industrial) | -40C to +85C (Industrial grade, "RI" suffix) |
| Architecture | Third-generation Multiple Array MatriX (MAX) | CMOS EEPROM-based Multiple Array MatriX (MAX) |
| Macro Cells | — | 560 |
| Register Bits | — | 12,160 |
| User I/Os | — | 212 |
| Pin-to-Pin Delay | — | 10 ns (speed grade -10) |
| Maximum Frequency | — | 100 MHz to 125 MHz |
| Programming Method | — | In-system via IEEE 1149.1 (JTAG) |
| Nivel MSL | — | 3 (168 Hours) |
| Estado RoHS | — | ROHS3 Compliant (per fpgalink) |
| Configuration Memory | — | On-chip EEPROM (non-volatile) |