EPM9560RI208-20W vs EPM9560RI208-20 Comparación
Comparación detallada lado a lado de EPM9560RI208-20W por Intel y EPM9560RI208-20 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM9560RI208-20W | EPM9560RI208-20 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $48,75 | $21,10 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | — |
| Logic Array Blocks (LABs) | 16 LABs of 40 macrocells each | 16 |
| User I/O Pins | 212 | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Counter Frequency (fCNT) | 100 MHz | 100 MHz |
| Speed Grade | -20 | — |
| Tensión de alimentación | 5.0 V | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | Yes (IEEE Std. 1149.1 JTAG) |
| Programming Technology | CMOS EEPROM | — |
| Encapsulado | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power-Quad Flat Pack) 28x28 mm |
| Temperatura de funcionamiento | -40C to +85C (Industrial) | [DATA_NEEDED: operating temperature range grade] |
| Architecture | Third-generation Multiple Array MatriX (MAX) | Multiple Array MatriX (MAX) - third generation |
| Macro Cells | — | 560 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Propagation Delay (tPD) | — | 20 ns |
| Supply Voltage (VCC) | — | 5.0 V |
| Process Technology | — | CMOS EEPROM |
| Estado RoHS | — | [DATA_NEEDED: RoHS compliance status] |
| Tipo de montaje | — | Surface Mount |