EPM9560TC208-20 vs EPM9560RI208-20N Comparación
Comparación detallada lado a lado de EPM9560TC208-20 por Altera y EPM9560RI208-20N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM9560TC208-20 | EPM9560RI208-20N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $60,00 | $0,00 |
| Device Family | MAX 9000 | MAX 9000 |
| Macrocells | 560 | 560 |
| Usable Gates | 12000 | 12,000 |
| User I/O | 149 | — |
| Propagation Delay (tPD) | 20 ns | — |
| Speed Grade | -20 | — |
| Encapsulado | TQFP-208 (TC208) | 208-pin RQFP |
| Pin/Package Code | TC208 (JEDEC S-PQFP-G208) | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Technology | CMOS EEPROM | — |
| Core Supply Voltage | 5 V | — |
| I/O Supply Voltage (MultiVolt) | 3.3 V or 5 V | — |
| In-System Programming | Yes (IEEE Std 1149.1 JTAG) | — |
| Flip-Flops | 772 | — |
| Temperatura de funcionamiento | [DATA_NEEDED: commercial/industrial temperature grade] | Industrial (-40C to +85C) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Pin-to-Pin Delay | — | 20 ns (-20 speed grade) |
| Counter Speed | — | 100 MHz |
| Tensión de alimentación | — | 5.0 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Development Tool | — | MAX+PLUS II |
| Design Entry | — | Schematic, VHDL, Verilog HDL, AHDL |
| Packaging | — | Tray |
| Logic Architecture | — | Third-generation MAX (Multiple Array MatriX) |
| Fabrication Process | — | Advanced CMOS |