IR2117STRPBF vs IRS2181STRPBF Comparación
Comparación detallada lado a lado de IR2117STRPBF por Infineon y IRS2181STRPBF por Infineon. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | IR2117STRPBF | IRS2181STRPBF |
|---|---|---|
| Marca | Infineon | Infineon |
| Categoría | Power MOSFET Drivers | Power MOSFET Drivers |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,58 | $0,62 |
| Configuration | High-Side Single Channel | High-side and low-side referenced, non-inverting |
| Función | Gate Driver, Non-Inverting | Half-Bridge Gate Driver |
| Input Logic Compatibility | CMOS / TTL | — |
| Número de salidas | 1 | 2 (HO, LO) |
| Driven Device | N-Channel MOSFET / IGBT | — |
| Gate Drive Supply Voltage (VCC) | 10 V to 20 V | — |
| Floating Channel Offset Voltage | up to +600 V | — |
| Peak Source Current (IOUT+) | 250 mA | — |
| Peak Sink Current (IOUT-) | 500 mA | — |
| Propagation Delay (Ton/Toff) | 125 ns (max) | — |
| Tiempo de subida | 80 ns (typ) | — |
| Tiempo de bajada | 40 ns (typ) | — |
| Undervoltage Lockout (UVLO) | Yes | — |
| Negative Transient Voltage Tolerance | Yes, dV/dt immune | — |
| Rango de temperatura de funcionamiento | -40 C to +125 C | -40 C to +125 C (junction) |
| Encapsulado / Carcasa | 8-SOIC (0.154 inch / 3.90 mm width) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | Compliant | — |
| Lead-Free | Yes | — |
| Nivel MSL | MSL3 (per JEDEC J-STD-020) | MSL 2 / 3 (per JEDEC J-STD-020, [DATA_NEEDED: exact MSL floor-life]) |
| Offset Voltage (max) | — | 600 V |
| VCC Supply Voltage | — | 10 V to 20 V |
| VBS Bootstrap Supply Voltage | — | 10 V to 20 V (referenced to VS) |
| Output Source Current (typ) | — | 1.9 A |
| Output Sink Current (typ) | — | 2.3 A |
| Rise / Fall Time (typ) | — | [DATA_NEEDED: typical rise/fall time with 1000 pF load] |
| Propagation Delay (typ) | — | [DATA_NEEDED: t_on / t_off matching] |
| Logic Input Compatibility | — | 3.3 V and 5 V logic |
| Under-Voltage Lockout (UVLO) | — | Present on VCC and VBS |
| Shutdown Pin (SD) | — | Yes, active-low compatible input stage |
| Encapsulado | — | 8-pin SOIC (SO-8, 0.154" / 3.90 mm body width) |
| Lead Finish | — | Pb-free (PBF suffix) |
| RoHS Compliance | — | Compliant (Pb-free) |