IRS2004STRPBF vs IRS2101STRPBF Comparación
Comparación detallada lado a lado de IRS2004STRPBF por Infineon y IRS2101STRPBF por Infineon. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | IRS2004STRPBF | IRS2101STRPBF |
|---|---|---|
| Marca | Infineon | Infineon |
| Categoría | Power MOSFET Drivers | Power MOSFET Drivers |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,66 | $1,18 |
| Topología | Half-Bridge Gate Driver | — |
| Driver Channels | 1 high-side + 1 low-side (dependent) | — |
| Offset Voltage (Voffset max) | 200 V | — |
| Output Source Current (typ) | 0.29 A | — |
| Output Sink Current (typ) | 0.6 A | — |
| Gate Drive Supply (VCC) | 10 V to 20 V | 10 V to 20 V |
| Logic Supply (VDD) | 3.3 V to 20 V (logic compatible) | — |
| Logic Input Compatibility | 3.3 V / 5 V CMOS/LSTTL | 3.3 V / 5 V / 15 V |
| Propagation Delay (typ) | [DATA_NEEDED: propagation delay] | — |
| Rise/Fall Time (typ) | [DATA_NEEDED: rise/fall time] | — |
| Shutdown Input | Yes (active) | — |
| Undervoltage Lockout | Yes (both channels) | Yes (VCC and VBS) |
| Bootstrap Operation | Yes (external diode required) | — |
| Encapsulado | SOIC-8 | 8-SOIC (SOIC-8) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Rango de temperatura de funcionamiento | -40 C to +125 C | — |
| Estado RoHS | Compliant (Pb-free PBF suffix) | Compliant (PBF suffix) |
| Nivel MSL | MSL2 | — |
| Driver Type | — | High-Side, Low-Side (Half-Bridge) |
| Number of Drivers | — | 2 |
| Número de salidas | — | 2-OUT |
| Configuración de salida | — | Non-Inverting |
| Maximum Offset Voltage | — | 600 V |
| Bootstrap Supply (VBS) | — | 10 V to 20 V |
| Source Current (typical) | — | 0.29 A |
| Sink Current (typical) | — | 0.6 A |
| VS Transient Range | — | -5 V to +600 V (logic operational) |
| Propagation Delay Matching | — | Matched both channels |
| dV/dt Immunity | — | Yes (latch-immune CMOS) |
| Temperatura de funcionamiento | — | -40C to +125C |
| Packaging | — | Tape & Reel (TRPBF) |
| Technology | — | HVIC + latch-immune CMOS |