LC4032B-5T48C vs LC4032B-5T48I Comparación

Comparación detallada lado a lado de LC4032B-5T48C por Lattice Semiconductor y LC4032B-5T48I por Lattice Semiconductor. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.

Lattice Semiconductor
LC4032B-5T48C LC4032B-5T48C - 32-Macrocell 400 MHz CPLD | Lattice

LC4032B-5T48C - 32-Macrocell 400 MHz CPLD | Lattice

LC4032B-5T48C ✓ Activo
Lattice Semiconductor
LC4032B-5T48I LC4032B-5T48I - 400MHz 32-Macrocell CPLD | Lattice

LC4032B-5T48I - 400MHz 32-Macrocell CPLD | Lattice

LC4032B-5T48I Unknown

Comparación de especificaciones

Parámetro LC4032B-5T48C LC4032B-5T48I
Marca Lattice Semiconductor Lattice Semiconductor
Categoría FPGA & CPLD FPGA & CPLD
Estado del ciclo de vida Activo Unknown
Estado del stock In Stock In Stock
Precio unitario (USD) $0,00 $0,00
Product Type ispMACH 4000B high-density in-system programmable PLD —
Macrocell Count 32 macrocells —
Maximum Operating Frequency 400 MHz 400 MHz
Propagation Delay 2.5 ns 2.5 ns
Supply Voltage Family 3.3 V / 2.5 V / 1.8 V —
Programming Type In-system programmable —
Device Family ispMACH 4000 —
Architecture Description Blend of ispLSI 2000 and ispMACH 4A architectures —
Encapsulado 48-pin TQFP 48-lead TQFP
Logic Type SuperFAST high-density PLD —
Global Clock Inputs [DATA_NEEDED: global clock input count] Up to 4 global clock pins
I/O Standard [DATA_NEEDED: I/O voltage standards] —
Rango de temperatura de funcionamiento [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
Tipo de montaje Surface mount Surface mount
Estado RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
REACH Status [DATA_NEEDED: REACH status] [DATA_NEEDED: REACH status]
AEC-Q100 Qualification [DATA_NEEDED: automotive qualification status] [DATA_NEEDED: AEC-Q100 qualification status]
Device Type — In-system-programmable SuperFAST high-density PLD
Device Category — CPLD
Macrocells — 32 macrocells
Supported Supply Levels — 3.3 V, 2.5 V, and 1.8 V
Clock Polarity — Programmable
Product Terms per Output — Up to 80 PTs
Configuration Method — In-system programmable
Speed Grade — -5
Temperature Grade — Industrial suffix
Core Supply Current — [DATA_NEEDED: core supply current]
I/O Supply Voltage — [DATA_NEEDED: I/O supply voltage]
Tipo de memoria — [DATA_NEEDED: configuration memory type]

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