LC4064V-5T44C vs LC4064C-5T44C Comparación

Comparación detallada lado a lado de LC4064V-5T44C por Lattice Semiconductor y LC4064C-5T44C por Lattice Semiconductor. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.

Lattice Semiconductor
LC4064V-5T44C LC4064V-5T44C - 5 ns 64-Macrocelle ISP CPLD | Lattice

LC4064V-5T44C - 5 ns 64-Macrocelle ISP CPLD | Lattice

LC4064V-5T44C Unknown
Lattice Semiconductor
LC4064C-5T44C LC4064C-5T44C - 64-Macrocell 5 ns CPLD | Lattice Semiconductor

LC4064C-5T44C - 64-Macrocell 5 ns CPLD | Lattice Semiconductor

LC4064C-5T44C Unknown

Comparación de especificaciones

Parámetro LC4064V-5T44C LC4064C-5T44C
Marca Lattice Semiconductor Lattice Semiconductor
Categoría FPGA & CPLD FPGA & CPLD
Estado del ciclo de vida Unknown Unknown
Device Type Complex Programmable Logic Device (CPLD) SuperFast high-density in-system-programmable PLD
Product Family ispMACH 4000V series —
Macrocells 64 macrocells —
Propagation Delay 5 ns 2.5 ns
Logic Array Blocks 4 logic array blocks —
User I/O Pins 30 user I/O pins —
Internal Supply Voltage 3 V to 3.6 V —
Programming Supply Options 3.3 V, 2.5 V, or 1.8 V —
Programming Method In-system programmable —
Encapsulado 44-TQFP, 10 x 10 mm 44-pin TQFP
Tipo de montaje Surface mount Surface mount
Lead Pitch [DATA_NEEDED: TQFP lead pitch] —
Rango de temperatura de funcionamiento [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
Frecuencia de reloj máxima [DATA_NEEDED: maximum clock frequency] —
Configuration Memory Type [DATA_NEEDED: configuration memory type] —
I/O Standards [DATA_NEEDED: supported I/O standards] —
Corriente de alimentación [DATA_NEEDED: typical and maximum supply current] —
Estado RoHS [DATA_NEEDED: RoHS status] —
REACH Status [DATA_NEEDED: REACH status] —
AEC-Q100 Qualification [DATA_NEEDED: AEC-Q100 qualification] —
Estado del ciclo de vida [DATA_NEEDED: lifecycle status] —
Device Family — ispMACH 4000C
Architecture — Complex programmable logic device
Macrocell Count — 64 macrocells
Speed Grade — 5 ns
Maximum Operating Frequency — 227 MHz
Maximum fMAX — 400 MHz
Supply Voltage Options — 1.8 V, 2.5 V, and 3.3 V
Nominal Supply Voltage — 1.8 V
Programming Type — In-system programmable
Configuration Memory — Nonvolatile programmable logic configuration
Global Clock Inputs — Up to 4
Global Clock Polarity — Programmable
Output Routing Capacity — Up to 80 product terms per output
Packaging — Tray
I/O Standard — [DATA_NEEDED: supported I/O standards]
RoHS Compliance — [DATA_NEEDED: RoHS compliance status]
REACH Compliance — [DATA_NEEDED: REACH compliance status]

Hojas de datos y recursos

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