LFE3-35EA-6FTN256I vs LCMXO3LF-6900E-5MG256I Comparación
Comparación detallada lado a lado de LFE3-35EA-6FTN256I por Lattice Semiconductor y LCMXO3LF-6900E-5MG256I por Lattice Semiconductor. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Lattice Semiconductor
LFE3-35EA-6FTN256I - ECP3 33K LUTs FPGA 1.2V | Lattice
LFE3-35EA-6FTN256I ✓ ActivoLattice Semiconductor
LCMXO3LF-6900E-5MG256I - 6864 LUT MachXO3LF FPGA | Lattice
LCMXO3LF-6900E-5MG256I ✓ ActivoComparación de especificaciones
| Parámetro | LFE3-35EA-6FTN256I | LCMXO3LF-6900E-5MG256I |
|---|---|---|
| Marca | Lattice Semiconductor | Lattice Semiconductor |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $30,10 | $15,68 |
| Family | LatticeECP3 | MachXO3LF |
| Logic Elements / LUTs | 33,000 (33.3K LUTs) | 6,864 LUTs |
| Number of Logic Cells | 33,000 | — |
| Number of I/O | 133 user I/O | — |
| Embedded Block RAM | 1,358,848 bits (1.36 Mbit) | — |
| DSP Blocks (18x18 multipliers) | 24 | — |
| On-die SERDES Channels | 4 (multi-protocol: PCIe, SGMII, CPRI, JESD204A/B) | — |
| Core Supply Voltage | 1.2 V | — |
| Speed Grade | -6 | -5 |
| Temperatura de funcionamiento | -40C to +100C (Industrial, 'I' suffix) | -40C to +100C (Industrial) |
| Encapsulado | 256-ball ftBGA (FTN256) | 256-ball csfBGA (MG256), 0.5 mm pitch |
| Process Technology | 65 nm CMOS | 65 nm Flash + CMOS |
| Configuration | External SPI flash, dual-boot, bitstream encryption supported | — |
| Estado RoHS | Compliant | Compliant |
| Tipo de montaje | Surface Mount (BGA) | Surface Mount (BGA) |
| Series / Grade | — | 6900E |
| User I/O Count | — | 206 |
| Embedded Memory | — | 245,760 bits |
| Configuration Memory | — | On-chip Flash (non-volatile) |
| Core Voltage | — | 1.2 V |
| Single-Rail Supply Option | — | 2.5 V / 3.3 V |
| I/O Banks | — | Multiple banks (LVCMOS 1.2 V - 3.3 V, LVDS) |
| Configuration Interfaces | — | I2C / SPI / Slave JTAG |
| PLLs | — | 2 PLL pairs |