LTC2145CUP-12 vs LTC2182CUP Comparación
Comparación detallada lado a lado de LTC2145CUP-12 por Analog Devices y LTC2182CUP por Analog Devices. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Analog Devices
LTC2145CUP-12 - 12-Bit 125Msps Dual ADC, 1.8V, 64-QFN | Analog Devices
LTC2145CUP-12 ✓ ActivoComparación de especificaciones
| Parámetro | LTC2145CUP-12 | LTC2182CUP |
|---|---|---|
| Marca | Analog Devices | Analog Devices |
| Categoría | ADC/DAC | ADC/DAC |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $26,40 | $65,20 |
| Resolución | 12 bits | 16 bit |
| Sample Rate | 125 Msps | 65 Msps |
| Number of Channels | 2 (simultaneous sampling) | 2 (simultaneous sampling) |
| Architecture | Pipelined with on-chip S/H | Pipelined |
| Analog Supply Voltage | 1.8 V (single supply) | — |
| Digital I/O Supply | 1.2 V to 1.8 V (separate supply) | — |
| Analog Input Type | Differential | — |
| INL (typical) | ±0.3 LSB | — |
| DNL (typical) | ±0.1 LSB (no missing codes over temperature) | — |
| Transition Noise | 0.3 LSB RMS | — |
| SNR | 70.6 dB | — |
| SFDR | 89 dB | — |
| Aperture Jitter | 0.08 ps RMS | 0.07 ps RMS |
| Output Modes | Full-rate CMOS, DDR CMOS, DDR LVDS (selectable) | — |
| Rango de temperatura de funcionamiento | 0 °C to +70 °C (C grade) | — |
| Encapsulado | 64-QFN EP (9 mm x 9 mm, exposed pad) | 64-QFN (UP) 9x9 mm |
| Tipo de montaje | Surface Mount | — |
| Estado RoHS | Compliant (#PBF suffix indicates lead-free RoHS) | Compliant |
| Signal-to-Noise Ratio (SNR) | — | 77 dB |
| Spurious-Free Dynamic Range (SFDR) | — | 90 dB |
| Analog Supply Voltage (VDD) | — | 1.8 V (1.7 V to 1.9 V) |
| Analog Input Range | — | 1 V to 2 V peak-to-peak (differential) |
| Input Common-Mode Voltage | — | 0.7 V to 1.25 V |
| External Reference Range | — | 0.625 V to 1.300 V |
| Digital Output Interface | — | Parallel CMOS / LVDS |
| Temperatura de funcionamiento | — | 0C to +70C (commercial grade) |
| Nivel MSL | — | 1 (per JEDEC J-STD-020) |
| Lead-Free Finish | — | Yes (PBF suffix) |