M1AFS600-FGG484I vs AFS600-FGG484 Comparación
Comparación detallada lado a lado de M1AFS600-FGG484I por Microchip Technology y AFS600-FGG484 por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
M1AFS600-FGG484I - 600K Gate Fusion FPGA, 172 I/O | Microchip
M1AFS600-FGG484I ✓ Activo
Comparación de especificaciones
| Parámetro | M1AFS600-FGG484I | AFS600-FGG484 |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $128,40 | $0,00 |
| Family | Fusion (M1 series, ARM Cortex-M1 enabled) | — |
| System Gates | 600K | 600000 gates |
| Logic Elements (flash cells) | 110592 | — |
| User I/O | 172 | — |
| Core Voltage | 1.5 V | — |
| Process Technology | 130 nm | — |
| Configuration Memory | Flash-based (on-chip) | — |
| Processor Support | ARM Cortex-M1 | Optional ARM support |
| Security | 128-bit FlashLock with AES decryption | — |
| Analog Features | Configurable analog blocks (mixed-signal) | — |
| Encapsulado | 484-ball FBGA (FGG484) | 484-pin FBGA; one verified source alternatively labels BGA-256 |
| Tipo de montaje | Surface Mount | Surface mount |
| Temperature Grade | Industrial (I) | — |
| Temperatura de funcionamiento | -40C to +85C | 0 C to 70 C |
| Estado RoHS | RoHS Compliant | — |
| Lead Free Status | Lead Free | — |
| Packaging | Tray | — |
| Max Frequency | [DATA_NEEDED: maximum fabric frequency] | — |
| Device Type | — | Fusion mixed-signal FPGA |
| Maximum Frequency | — | 1098.9 MHz |
| Technology | — | 130 nm |
| Metal Layers | — | 7 layers |
| Process | — | Flash-based CMOS |
| Tensión de alimentación | — | 1.5 V |
| I/O Count | — | 172 I/O |
| Configuration Retention | — | Nonvolatile flash |
| Power-Up Feature | — | Live at Power-Up (LAPU) |
| Architecture | — | Monolithic mixed-signal FPGA |
| Programmable Logic | — | High-performance flash-based programmable logic |
| Analog Resources | — | Configurable analog resources |
| Flash Memory | — | Large flash-memory blocks |
| Clocking | — | Comprehensive clock generation and management circuitry |
| Estado del ciclo de vida | — | [DATA_NEEDED: current lifecycle status] |
| RoHS Compliance | — | [DATA_NEEDED: RoHS compliance status] |
| REACH Compliance | — | [DATA_NEEDED: REACH compliance status] |