MAX1296AEEG vs MAX130CQH+TD Comparación
Comparación detallada lado a lado de MAX1296AEEG por Maxim Integrated y MAX130CQH+TD por Maxim Integrated. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Maxim Integrated
MAX1296AEEG - 420ksps 12-Bit 2-Ch ADC +2.5V Ref | Maxim Integrated
MAX1296AEEG ✓ Activo
Comparación de especificaciones
| Parámetro | MAX1296AEEG | MAX130CQH+TD |
|---|---|---|
| Marca | Maxim Integrated | Maxim Integrated |
| Categoría | ADC/DAC | ADC/DAC |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $6,05 | $9,50 |
| Resolución | 12 bit | 3½ digits (up to ±2000 counts) |
| Frecuencia de muestreo | 420 ksps | — |
| Number of Input Channels | 2 single-ended / 1 pseudo-differential | — |
| Architecture | SAR (Successive Approximation Register) | Dual-slope integrating ADC |
| Conversion Type | 1 SAR, 1 input per conversion | — |
| Supply Voltage (Analog) | +5 V single supply | — |
| Internal Reference Voltage | +2.5 V | — |
| Linearity (DNL/INL) | ±0.5 LSB | — |
| Data Interface | Parallel (word access) | — |
| Rango de tensión de entrada | 0 to VREF / pseudo-diff ±REF | ±200 mV to ±2 V (full-scale ranges) |
| Rango de temperatura de funcionamiento | -40 °C to +85 °C | — |
| Package / Pin Count | 24-pin QSOP | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Supply Current (Active) | 8.3 mA typical | — |
| Corriente de apagado | < 1 µA | — |
| Estado RoHS | Compliant | Compliant |
| Conversion Method | — | Dual-slope with auto-zero |
| Integrated Reference | — | Internal bandgap reference |
| Common-Mode Rejection | — | Rejects 50 Hz / 60 Hz line noise (per datasheet) |
| Temperatura de funcionamiento | — | -40 °C to +85 °C |
| Temperature Grade | — | Industrial |
| Encapsulado | — | LCC-44 (J-bend, plastic, MO-047AC) |
| Package Code | — | QCCJ |
| Terminal Form | — | J-bend (leadless, under-body terminations) |
| Number of Terminals | — | 44 |
| Package Shape | — | Square leadless chip carrier |
| Lead Finish | — | Lead-free (Pb-free Matte Tin over NiPdAu) |
| Output Format | — | BCD + sign bit + over-range bit |
| Nivel MSL | — | [DATA_NEEDED: MSL level not in provided sources] |