MC8641VU1000NE vs MC8641DVU1000GE Comparación
Comparación detallada lado a lado de MC8641VU1000NE por NXP Semiconductors y MC8641DVU1000GE por NXP Semiconductors. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
NXP Semiconductors
MC8641DVU1000GE - Dual 1GHz e600 SoC, 1023-FCBGA | NXP
MC8641DVU1000GE ⚠ Última compraComparación de especificaciones
| Parámetro | MC8641VU1000NE | MC8641DVU1000GE |
|---|---|---|
| Marca | NXP Semiconductors | NXP Semiconductors |
| Categoría | Microcontrollers | Microcontrollers |
| Estado del ciclo de vida | Obsolete | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $165,00 | $295,50 |
| Core Processor | PowerPC e600 | — |
| Number of Cores | 1 | — |
| Bus Width | 32-bit | — |
| Core Clock Speed | 1.0 GHz | — |
| Co-Processor / DSP | AltiVec SIMD engine | — |
| RAM Controllers | DDR1, DDR2 (with ECC) | — |
| Ethernet | 10/100/1000 Mbps x4 (GbE) | 4 x 10/100/1000 Mbps MAC |
| Serial RapidIO (SRIO) | Yes | — |
| PCI Express | Yes | 2 x PCIe interfaces |
| Graphics Acceleration | No | — |
| Core Voltage | 1.05 V | — |
| I/O Voltage | 1.8 V / 2.5 V / 3.3 V | — |
| Temperatura de funcionamiento | 0 °C to +105 °C | 0 C to +105 C |
| Silicon Revision | Rev 3.0 | Rev 3.0 |
| Process Technology | 90 nm CMOS | — |
| Encapsulado | 994-ball FCCBGA (33 x 33 mm) | 1023-ball FCCBGA (33 x 33 mm) |
| Tipo de montaje | Surface Mount (BGA) | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | — |
| Tensión de alimentación | 1.05 V / 1.8 V / 2.5 V / 3.3 V | — |
| Series | MPC86xx | — |
| Processor Type | — | PowerPC e600 MPC86xx 32-Bit |
| Core Count | — | 2 (dual-core) |
| Core Architecture | — | Power Architecture, superscalar, 7-stage pipeline |
| Core Frequency | — | 1.0 GHz |
| Maximum Core Frequency | — | Up to 1.5 GHz (family max) |
| Core Supply Voltage | — | 1.05 V |
| SIMD Engine | — | AltiVec (128-bit vector unit) |
| L1 Cache | — | 32 KB instruction + 32 KB data per core |
| L2 Cache | — | 1 MB unified backside |
| Memory Controller | — | DDR1 / DDR2 with ECC |
| Serial RapidIO | — | 2 x SRIO ports |