MIMXRT1064CVL5A vs MIMXRT1061CVL5B Comparación
Comparación detallada lado a lado de MIMXRT1064CVL5A por NXP Semiconductors y MIMXRT1061CVL5B por NXP Semiconductors. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
NXP Semiconductors
MIMXRT1064CVL5A - 528MHz Cortex-M7 MCU 4MB Flash | NXP i.MX RT1064
MIMXRT1064CVL5A Nrnd
Comparación de especificaciones
| Parámetro | MIMXRT1064CVL5A | MIMXRT1061CVL5B |
|---|---|---|
| Marca | NXP Semiconductors | NXP Semiconductors |
| Categoría | Microcontrollers | Microcontrollers |
| Estado del ciclo de vida | NRND | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $6,10 | $8,04 |
| Core Architecture | Arm Cortex-M7 | ARM Cortex-M7 |
| Maximum CPU Frequency | 528 MHz | — |
| FPU | Single-precision + Double-precision | Double-precision IEEE 754 |
| On-chip Flash | 4 MB | — |
| On-chip SRAM | 1 MB | — |
| Encapsulado | 196-LFBGA | — |
| Tipo de montaje | Surface Mount | — |
| Tensión de alimentación | 0.9 V to 1.3 V core / 3.0 V to 3.6 V IO | — |
| Rango de temperatura de funcionamiento | -40C to +105C (industrial) | -40C to +105C (Industrial) |
| USB | 2x USB 2.0 OTG with integrated PHY | — |
| Ethernet | 10/100 Mbit MAC | — |
| LCD Controller | Up to WXGA resolution, 24-bit parallel | — |
| Camera Interface | 8/16-bit CSI | — |
| CAN | 2x FlexCAN | — |
| LFBGA Ball Count | 196 | — |
| Estado RoHS | Compliant | Compliant |
| Lifecycle | NRND (Not Recommended for New Designs) | — |
| Maximum Core Frequency | — | 528 MHz |
| Core Count | — | 1 |
| Bit Width | — | 32-bit |
| Operating Voltage (Vcc/Vdd) | — | 3.0 V to 3.6 V |
| On-Chip SRAM | — | 1 MB |
| Package Type | — | 196-MAPBGA (10x10 mm) |
| Estilo de montaje | — | Surface Mount |
| Series | — | i.MX RT1060 |
| ADC Resolution | — | 12-bit |
| ADC Channels | — | 20 |
| External Memory Interfaces | — | FlexSPI (x2), SEMC, Parallel NAND/NOR |
| L1 Cache | — | 16 KB Instruction + 16 KB Data |
| DSP Extensions | — | Yes (SIMD, MAC) |
| Nivel MSL | — | 3 (per JEDEC J-STD-020) |