MPC8548EVTAVHD vs MPC8548EVTAVHD557 Comparación
Comparación detallada lado a lado de MPC8548EVTAVHD por NXP Semiconductors y MPC8548EVTAVHD557 por NXP Semiconductors. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | MPC8548EVTAVHD | MPC8548EVTAVHD557 |
|---|---|---|
| Marca | NXP Semiconductors | NXP Semiconductors |
| Categoría | Microcontrollers | Microcontrollers |
| Estado del ciclo de vida | Activo | NRND |
| Series | PowerQUICC III | — |
| Core Architecture | Power Architecture e500 v2 | — |
| Core Count | 1 | — |
| Bit Width | 32-bit | — |
| Maximum CPU Clock | 1.5 GHz | — |
| Process Technology | 0.09 um CMOS | — |
| L1 Cache | 32 KB I-cache + 32 KB D-cache | 32 KB instruction + 32 KB data |
| L2 Cache | 512 KB unified on-chip | [DATA_NEEDED: L2 cache size] |
| Memory Controller | 64-bit DDR2 SDRAM with ECC, up to 533 MT/s | — |
| Security Engine | SEC 2.0 (AES, DES, 3DES, Kasumi, SHA, MD5, public-key) | SEC 2.0 (IPsec, SSL/TLS, 3DES, AES, SHA, RSA, ECC) |
| Ethernet | 4x Gigabit Ethernet (SGMII/RGMII/TBI/RTBI) | — |
| PCI Express | 2x PCIe interfaces | 2x PCIe interfaces (x1/x2/x4 capable) |
| Serial RapidIO | 2x SRIO ports | 2x SRIO ports (1x/4x lane) |
| PCI / PCI-X | 2x 64-bit PCI/PCI-X | 2x 64-bit PCI / PCI-X controllers |
| Tensión de alimentación de funcionamiento | 1.8 V / 2.5 V / 3.3 V | — |
| Temperatura de funcionamiento | 0C to +105C | 0 C to +105 C (extended) |
| Encapsulado | 783-FCBGA (29x29 mm) | 783-ball FCBGA, 29x29 mm |
| Tipo de montaje | Surface Mount | — |
| Estado RoHS | [DATA_NEEDED: rohs status] | Compliant (lead-free FCBGA) |
| Silicon Revision | R3 | — |
| Family | — | PowerQUICC III (MPC85xx) |
| Core | — | Power Architecture e500, 32-bit |
| Core Frequency | — | 1.5 GHz |
| Instruction Set | — | Power Architecture Book E + signal-processing engine |
| FPU | — | Double-precision hardware FPU |
| Gigabit Ethernet | — | 3x 10/100/1000 enhanced GETH with SGMII / RGMII / RTBI |
| DDR Memory Controller | — | 2x 64-bit DDR2 with ECC, up to 533 MHz |
| Local Bus | — | 8-bit / 16-bit / 32-bit Local Bus + GPIO |
| Serial I/O | — | 4x I2C, 2x UART, DUART, SPI |
| Tensión de alimentación | — | 1.0 V core / 1.5 V DDR / 1.8 V / 2.5 V / 3.3 V I/O |
| Process Node | — | 90 nm CMOS |