MPC8548PXATGD vs MPC8548PXAQGD Comparación
Comparación detallada lado a lado de MPC8548PXATGD por NXP Semiconductors y MPC8548PXAQGD por NXP Semiconductors. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
NXP Semiconductors
MPC8548PXAQGD - PowerQUICC III e500 SoC 1GHz, 783-FCBGA | NXP
MPC8548PXAQGD ✓ ActivoComparación de especificaciones
| Parámetro | MPC8548PXATGD | MPC8548PXAQGD |
|---|---|---|
| Marca | NXP Semiconductors | NXP Semiconductors |
| Categoría | Microcontrollers | Microcontrollers |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $208,00 | $171,00 |
| Manufacturer | NXP Semiconductors (formerly Freescale) | — |
| Series | MPC85xx PowerQUICC III | — |
| Core | PowerPC e500 | — |
| Architecture | Power Architecture Book-E | — |
| Number of Cores | 1 | — |
| Ancho del bus de datos | 32-bit | 32-bit |
| Core Frequency | 1.2 GHz | — |
| Temperatura de funcionamiento | 0C to +105C | 0C to +105C (industrial extended) |
| Encapsulado | 783-FCPBGA (29x29) | 783-ball FCBGA, 1.0 mm pitch (Pb-free) |
| Tipo de montaje | Surface Mount | Surface Mount (BGA) |
| Tensión de alimentación | 1.0V core / 1.8V / 2.5V / 3.3V I/O | [DATA_NEEDED: core/IO/serdes voltages] |
| Memory Controller | 32-bit DDR2 SDRAM with ECC | DDR2 SDRAM with ECC, up to 2 GB |
| Ethernet | 4x Gigabit Ethernet MACs | Dual 10/100/1000 Mbps MACs (SGMII / TBI) |
| PCI Interfaces | PCI, PCI-X, PCI Express | — |
| Serial Interfaces | Serial RapidIO (SRIO) | — |
| Process Technology | 0.09 um CMOS | — |
| Estado RoHS | Compliant | Compliant (Pb-free package suffix GD) |
| Product Type | — | PowerQUICC III Communications SoC / Microprocessor |
| Series / Family | — | PowerQUICC III (PQ38) |
| Core Architecture | — | Power Architecture e500 (Book E) |
| Core Count | — | 1 |
| Maximum Core Frequency | — | 1000 MHz (1.0 GHz) |
| Silicon Revision | — | R3.0 |
| L1 Cache | — | 32 KB instruction / 32 KB data |
| L2 Cache | — | 256 KB integrated |
| PCI / PCI-X | — | 1x PCI-X 64-bit/133 MHz + 2x PCI 32-bit/66 MHz |
| PCI Express | — | 2x PCIe interfaces (x1/x2/x4) |
| Serial RapidIO | — | 1x SRIO port |
| Process Node | — | [DATA_NEEDED: process technology] |