P5010NSE1QMB557 vs P5010NSN1QMB Comparación
Comparación detallada lado a lado de P5010NSE1QMB557 por NXP Semiconductors y P5010NSN1QMB por NXP Semiconductors. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
NXP Semiconductors
P5010NSE1QMB557 - QorIQ P5 PowerPC 64-Bit MPU, 2GHz | NXP
P5010NSE1QMB557 ✓ ActivoNXP Semiconductors
P5010NSN1QMB - QorIQ P5010 SoC, 64-bit Power Arch, 2.0GHz, 1295-FCBGA | NXP
P5010NSN1QMB ✓ ActivoComparación de especificaciones
| Parámetro | P5010NSE1QMB557 | P5010NSN1QMB |
|---|---|---|
| Marca | NXP Semiconductors | NXP Semiconductors |
| Categoría | DSP | Microcontrollers |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $285,00 | $318,25 |
| Core Architecture | PowerPC e5500 (64-bit) | — |
| Core Count | 1 | 1 core |
| Maximum Core Frequency | 2.0 GHz | 2.0 GHz |
| L2 Cache | 1 MB | — |
| L3 Cache | 512 KB | — |
| Memory Controller | 64-bit DDR3/DDR3L with ECC | DDR3 with ECC support |
| Encapsulado | 1295-FCPBGA (37.5 x 37.5 mm) | 1295-FCBGA (37.5 x 37.5 mm) |
| Process Technology | [DATA_NEEDED: process node nm] | — |
| Rango de temperatura de funcionamiento | -40C to +105C | — |
| Ethernet Interfaces | 10 Gigabit Ethernet + Gigabit Ethernet MACs | — |
| PCIe Controllers | 2 x PCIe Gen 2 | — |
| Security Engine | Symmetric and asymmetric cryptography | SEC crypto engine integrated |
| DMA Engines | Multiple | — |
| Tipo de montaje | Surface Mount (BGA) | — |
| Estado RoHS | Compliant | — |
| Architecture | — | Power Architecture e5500 (64-bit) |
| Cache (L1 Instruction per core) | — | 32 KB |
| Cache (L1 Data per core) | — | 32 KB |
| Cache (L2 shared frontside) | — | 1 MB |
| PCIe | — | PCI Express Gen 2 controllers integrated |
| Ethernet | — | Dual Gigabit Ethernet |
| High-Speed Interconnect | — | Serial RapidIO (SRIO) |
| Hardware Acceleration | — | DPAA (Data Path Acceleration Architecture) engine |
| Temperatura de funcionamiento | — | 0C to +105C |
| Encryption | — | Hardware-accelerated |