P82B96PN vs P82B96P Comparación
Comparación detallada lado a lado de P82B96PN por NXP Semiconductors y P82B96P por Texas Instruments. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | P82B96PN | P82B96P |
|---|---|---|
| Marca | NXP Semiconductors | Texas Instruments |
| Categoría | Interface ICs | Interface ICs |
| Estado del ciclo de vida | Activo | Activo |
| Product Type | Dual bidirectional I2C bus buffer | 2-bit bidirectional I2C/SMBus buffer and cable extender |
| Number of I2C Interfaces | 2 channels | — |
| Operating Voltage Range | 2 V to 15 V | — |
| Maximum I2C Bus Frequency | 400 kHz | — |
| Rango de temperatura de funcionamiento | -40 °C to +85 °C | [DATA_NEEDED: operating temperature range] |
| Encapsulado | SOT97-1, 8-pin plastic DIP | 8-pin PDIP |
| Tipo de montaje | Through-hole | Through-hole |
| Bidirectional Data Transfer | Supported | — |
| Bus-Side Signals | Sx and Sy | — |
| Forward and Reverse Path Signals | Tx, Rx, Ty, and Ry | — |
| I2C Logic Compatibility | Standard I2C-bus logic levels | — |
| Corriente de alimentación | [DATA_NEEDED: low supply-current value in mA] | [DATA_NEEDED: supply current] |
| Sx/Sy Logic-Level Thresholds | [DATA_NEEDED: Sx and Sy input and output voltage thresholds in V] | — |
| Propagation Delay | [DATA_NEEDED: propagation-delay value in ns] | [DATA_NEEDED: propagation delay] |
| Input and Output Capacitance | [DATA_NEEDED: pin capacitance in pF] | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| REACH Status | [DATA_NEEDED: REACH compliance status] | [DATA_NEEDED: REACH status] |
| Number of Channels | — | 2 channels |
| Operating Supply Voltage Range | — | 2 V to 15 V |
| Maximum Stated Operating Frequency | — | 400 kHz |
| Bus Compatibility | — | I2C and SMBus |
| Data Direction | — | Bidirectional |
| Interface Architecture | — | Non-latching bidirectional bus interface |
| Direction Control Input | — | None |
| Supported Logic Levels | — | 2 V to 15 V |
| Sx/Sy Same-Node Connection | — | Not supported |
| Corriente en reposo | — | [DATA_NEEDED: quiescent current] |
| Maximum Bus Capacitance | — | [DATA_NEEDED: maximum bus capacitance] |
| Input Logic High Voltage | — | [DATA_NEEDED: input logic-high voltage] |
| Input Logic Low Voltage | — | [DATA_NEEDED: input logic-low voltage] |
| Output Low-Level Voltage | — | [DATA_NEEDED: output low-level voltage] |
| Lead-Free Status | — | [DATA_NEEDED: lead-free status] |