RTAX1000SL-1CGS624B vs RTAX1000SL-CGS624E Comparación
Comparación detallada lado a lado de RTAX1000SL-1CGS624B por Microchip Technology y RTAX1000SL-CGS624E por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
RTAX1000SL-1CGS624B - Rad-Tolerant FPGA 1M Gates | Microchip
RTAX1000SL-1CGS624B ✓ ActivoMicrochip Technology
RTAX1000SL-CGS624E - 1M-Gate Rad-Tolerant FPGA CCGA-624 | Microchip
RTAX1000SL-CGS624E ✓ ActivoComparación de especificaciones
| Parámetro | RTAX1000SL-1CGS624B | RTAX1000SL-CGS624E |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $3.200,00 | $3.970,00 |
| Logic Density | 1,000,000 equivalent system gates | — |
| ASIC Gates | 125,000 additional ASIC gates | — |
| Configurable Logic Blocks (CLBs) | 12096 | 12096 |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | RTAX-S/SL Radiation-Tolerant FPGA |
| Series | RTAX1000SL | — |
| Speed Grade | -1 | — |
| Technology | Digital CMOS | — |
| Programming Technology | Anti-fuse (one-time programmable, live at power-up) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Encapsulado | 624-ball Ceramic CGA (CGS624) | 624-ball Ceramic Column Grid Array (CGS624) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Radiation Tolerance | Radiation-tolerant (space flight qualified) | Radiation-tolerant (space-flight qualified family) |
| Qualification | DLA SMD 5962-0422006QUA per MIL-PRF-38535 | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: Operating Temperature] |
| Tensión de alimentación | [DATA_NEEDED: core/IO supply voltage] | — |
| Maximum User I/O | [DATA_NEEDED: maximum user I/O count] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS Status] |
| Architecture Base | Derived from Microsemi commercial Axcelerator family | — |
| Equivalent System Gates | — | 1000000 gates |
| Additional ASIC Gates | — | 125000 gates |
| Maximum System Frequency | — | 581 MHz |
| Process Technology | — | 0.15 um CMOS |
| Core Supply Voltage | — | 1.5 V |
| Configuration | — | Non-volatile anti-fuse, live-at-power-up, single chip |
| Clocking Features | — | Segmentable clocks, chip-wide highway routing |
| Arithmetic Support | — | Dedicated carry logic |
| I/O Count | — | [DATA_NEEDED: User I/O Count] |