RTAX2000S-1CQ256PROTO vs RTAX2000SL-1CQ256PROTO Comparación
Comparación detallada lado a lado de RTAX2000S-1CQ256PROTO por Microchip Technology y RTAX2000SL-1CQ256PROTO por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
RTAX2000S-1CQ256PROTO - 2M-Gate Rad-Tolerant FPGA Proto | Microchip
RTAX2000S-1CQ256PROTO ✓ ActivoMicrochip Technology
RTAX2000SL-1CQ256PROTO - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000SL-1CQ256PROTO ✓ ActivoComparación de especificaciones
| Parámetro | RTAX2000S-1CQ256PROTO | RTAX2000SL-1CQ256PROTO |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1.595,00 | $0,00 |
| Logic Blocks (CLBs) | 21504 | — |
| Equivalent System Gates | 2000000 | 2,000,000 |
| Additional ASIC Gates | 250000 | — |
| Embedded Memory | up to 540 kbits with optional EDAC | Embedded SRAM with built-in FIFO control logic |
| Technology | Antifuse (nonvolatile, OTP), CMOS | — |
| SEU Rate | less than 1E-10 errors per bit-day (family spec) | — |
| Total Ionizing Dose (Functional) | 300 krad | — |
| Total Ionizing Dose (Parametric) | 200 krad | — |
| Encapsulado | CQ256 ceramic quad package, 256 pins | CQ256 (256-pin ceramic quad flat package) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Logic Family | CMOS | — |
| Maximum User I/Os (family) | up to 684 (density dependent) | — |
| Architecture Base | Axcelerator compatible fabric | — |
| Configuration | Live at power-up, no external boot device | — |
| Product Grade | PROTO - engineering prototyping unit | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range for PROTO suffix] | [DATA_NEEDED: Operating Temperature Range] |
| Tensión de alimentación | [DATA_NEEDED: core and I/O supply voltage] | — |
| Configurable Logic Blocks (CLBs) | — | 21,504 |
| Family | — | RTAX-S/SL Radiation-Tolerant FPGA |
| Logic Architecture Base | — | Axcelerator commercial architecture |
| Program Technology | — | Antifuse (One-Time Programmable) |
| Speed Grade | — | 1 |
| Device Grade | — | PROTO (prototype / engineering) |
| Radiation Tolerance | — | Radiation-tolerant (space-flight class) |
| Configuration Retention | — | Non-volatile, live at power-up |
| Clocking Features | — | Segmentable clocks, chip-wide highway routing |
| Core Supply Voltage | — | [DATA_NEEDED: Core Supply Voltage] |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O Supply Voltage] |
| Number of User I/Os (CQ256) | — | [DATA_NEEDED: User I/O count] |
| Estado RoHS | — | [DATA_NEEDED: RoHS Status] |