RTAX2000SL-1CQ352V vs RTAX2000SL-1CQ352PROTO Comparación
Comparación detallada lado a lado de RTAX2000SL-1CQ352V por Microchip Technology y RTAX2000SL-1CQ352PROTO por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
RTAX2000SL-1CQ352V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000SL-1CQ352V ✓ ActivoMicrochip Technology
RTAX2000SL-1CQ352PROTO - 2M-Gate Rad-Tolerant FPGA | Actel
RTAX2000SL-1CQ352PROTO ✓ ActivoComparación de especificaciones
| Parámetro | RTAX2000SL-1CQ352V | RTAX2000SL-1CQ352PROTO |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $2.050,00 | $0,00 |
| Family | RTAX-S/SL Radiation-Tolerant FPGA | RTAX-S/SL Radiation-Tolerant FPGAs |
| Equivalent System Gates | 2,000,000 | 2,000,000 |
| CLB Count | 21,504 | — |
| Logic Cells | 32,256 | 32,256 |
| Core Supply Voltage | 1.5 V (1.425 V to 1.575 V) | — |
| Process Technology | CMOS, antifuse OTP interconnect | CMOS, antifuse interconnect |
| Radiation Tolerance | Radiation-tolerant (space flight grade) | Radiation-tolerant (space-flight qualified family) |
| Configuration | Live at power-up, single chip (antifuse) | Live at power-up, single-chip |
| Embedded Memory | Embedded SRAM with built-in FIFO control | Embedded SRAM with FIFO control logic |
| Clocking | Segmentable clock resources, chip-wide highway routing | — |
| Encapsulado | 352-pin ceramic CQFP (CQ352) | CQFP-352 (ceramic quad flat pack) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Application Domain | Space flight systems | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range for PROTO variant] |
| I/O Supply Voltage | [DATA_NEEDED: I/O bank voltage] | — |
| Total Ionizing Dose (TID) | [DATA_NEEDED: TID rating] | — |
| Nivel MSL | Not applicable (ceramic package) | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Configurable Logic Blocks (CLBs) | — | 21,504 |
| ASIC Gate Equivalent | — | 250,000 |
| Terminal Pitch | — | 0.500 mm |
| Programmability | — | One-Time Programmable (antifuse, OTP) |
| Variant Designation | — | PROTO (prototyping device) |
| Core Voltage | — | [DATA_NEEDED: core supply voltage] |
| I/O Voltage | — | [DATA_NEEDED: I/O supply voltage] |