RTAX250SL-1CQ208PROTO vs RTAX1000SL-1LG624V Comparación
Comparación detallada lado a lado de RTAX250SL-1CQ208PROTO por Microchip Technology y RTAX1000SL-1LG624V por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
RTAX250SL-1CQ208PROTO - 250k-Gate Rad-Tolerant FPGA | Microchip
RTAX250SL-1CQ208PROTO ✓ ActivoMicrochip Technology
RTAX1000SL-1LG624V - 1M-Gate Rad-Tolerant FPGA | Microchip
RTAX1000SL-1LG624V ✓ ActivoComparación de especificaciones
| Parámetro | RTAX250SL-1CQ208PROTO | RTAX1000SL-1LG624V |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,00 | $975,00 |
| Family | RTAX-S/SL Radiation-Tolerant FPGAs | RTAX-SL (Radiation-Tolerant FPGA) |
| Equivalent System Gates | 250,000 | 1000000 |
| Logic Cells | 4224 | 18144 |
| Configurable Logic Blocks (CLBs) | 2816 | — |
| Combinatorial CLB Delay | 0.93 ns maximum (minimum -1 speed grade per source data) | — |
| Speed Grade | -1 | -1 |
| Technology | CMOS antifuse (one-time programmable) | — |
| Total Ionizing Dose Tolerance | Enhanced (SL variant) | — |
| Configuration | Live at power-up (antifuse, no boot device) | Live at power-up, single-chip |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with FIFO control logic |
| Clock Features | Segmentable chip-wide clocks | — |
| Encapsulado | CQFP-208 (CQ208) ceramic quad flat pack | 624-pin LG (LGA) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Application Grade | Space-flight (radiation-tolerant), PROTO screening | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Tensión de alimentación | [DATA_NEEDED: core supply voltage] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS Status] |
| CLBs (Combinatorial Logic Blocks) | — | 12096 |
| ASIC Gates | — | 125000 |
| Max CLB Combinatorial Delay | — | 0.93 ns |
| Process Technology | — | 0.15 um CMOS |
| Core Supply Voltage | — | 1.5 V |
| Programmability Type | — | OTP anti-fuse |
| Rango de temperatura de funcionamiento | — | -55C to +125C |
| Application Domain | — | Space-flight systems |