RTAX250SL-1CQ208PROTO vs RTAX250SL-CQ208V Comparación
Comparación detallada lado a lado de RTAX250SL-1CQ208PROTO por Microchip Technology y RTAX250SL-CQ208V por Microsemi. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
RTAX250SL-1CQ208PROTO - 250k-Gate Rad-Tolerant FPGA | Microchip
RTAX250SL-1CQ208PROTO ✓ ActivoMicrosemi
RTAX250SL-CQ208V - 250K-Gate Rad-Tolerant FPGA | Actel/Microsemi
RTAX250SL-CQ208V ✓ ActivoComparación de especificaciones
| Parámetro | RTAX250SL-1CQ208PROTO | RTAX250SL-CQ208V |
|---|---|---|
| Marca | Microchip Technology | Microsemi |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,00 | $1,00 |
| Family | RTAX-S/SL Radiation-Tolerant FPGAs | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs |
| Equivalent System Gates | 250,000 | — |
| Logic Cells | 4224 | 4224 |
| Configurable Logic Blocks (CLBs) | 2816 | — |
| Combinatorial CLB Delay | 0.93 ns maximum (minimum -1 speed grade per source data) | — |
| Speed Grade | -1 | — |
| Technology | CMOS antifuse (one-time programmable) | — |
| Total Ionizing Dose Tolerance | Enhanced (SL variant) | — |
| Configuration | Live at power-up (antifuse, no boot device) | Single-chip, live-at-power-up (no external boot device) |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Clock Features | Segmentable chip-wide clocks | — |
| Encapsulado | CQFP-208 (CQ208) ceramic quad flat pack | 208-Pin CQFP (ceramic quad flat pack) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Application Grade | Space-flight (radiation-tolerant), PROTO screening | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | -55C to +125C |
| Tensión de alimentación | [DATA_NEEDED: core supply voltage] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Programmable Logic Type | — | Radiation-Tolerant FPGA (antifuse, live at power-up) |
| System Gates | — | 250000 gates |
| CLBs | — | 2816 |
| Process Technology | — | 0.15 um CMOS |
| Core Supply Voltage | — | 1.5 V nominal |
| Maximum Frequency (family) | — | 649 MHz |
| Radiation Qualification Suffix | — | V (radiation qualified, space flight grade) |
| Clocking | — | Segmentable clocks, chip-wide highway routing |
| Special Logic | — | Carry logic for arithmetic; SEU-hardened flip-flops (SL variant) |