RTAX250SL-CG624V vs RTAX250S-CG624EV Comparación
Comparación detallada lado a lado de RTAX250SL-CG624V por Microchip Technology y RTAX250S-CG624EV por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
RTAX250SL-CG624V - 250k-Gate Rad-Tolerant FPGA | Microchip
RTAX250SL-CG624V ✓ ActivoMicrochip Technology
RTAX250S-CG624EV - 250K-Gate Rad-Tolerant FPGA | Microchip
RTAX250S-CG624EV ✓ ActivoComparación de especificaciones
| Parámetro | RTAX250SL-CG624V | RTAX250S-CG624EV |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $10.000,00 | $0,00 |
| Equivalent System Gates | 250000 | — |
| Logic Cells | 4224 | 4224 cells |
| CLB Count | 2816 | — |
| User I/O (Inputs) | 248 | — |
| User I/O (Outputs) | 248 | — |
| Core Supply Voltage | 1.425 V to 1.575 V | 1.5 V |
| Process Technology | CMOS | 0.15 um CMOS |
| Program Technology | Antifuse (one-time programmable) | — |
| Encapsulado | 624-pin Ceramic Column Grid Array (CG624) | — |
| Embedded SRAM | Yes (with built-in FIFO control logic) | — |
| Configuration Device Required | No (live at power-up) | — |
| Radiation Tolerance | Radiation-tolerant (space flight qualified family) | SEU-hardened registers; SEU rate < 10-10 errors per bit-day |
| Family | RTAX-S/SL and RTAX-DSP RadTolerant FPGAs | RTAX-S RadTolerant FPGA |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | -55C to +125C |
| Speed Grade | Standard (C) commercial flight grade; -1 speed variant available | — |
| Tipo de montaje | Surface Mount | Surface Mount (ceramic column grid array) |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| System Gates | — | 250000 gates |
| Configurable Logic Blocks (CLBs) | — | 2816 |
| Frecuencia de reloj máxima | — | 649 MHz |
| Package Type | — | 624-pin Ceramic Grid Array (CGA/CCGA) |
| Recuento de pines | — | 624 |
| Logic Family | — | CMOS |
| SEU Immunity | — | [DATA_NEEDED: LET threshold (MeV-cm2/mg)] |
| Configuration | — | Anti-fuse, live-at-power-up, single chip |