RTAX4000DL-CQ352E vs RTAX2000DL-CQ352E Comparación
Comparación detallada lado a lado de RTAX4000DL-CQ352E por Microchip Technology y RTAX2000DL-CQ352E por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
RTAX4000DL-CQ352E - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000DL-CQ352E ✓ ActivoMicrochip Technology
RTAX2000DL-CQ352E - 2M-Gate Rad-Tolerant FPGA CQFP-352 | Microchip
RTAX2000DL-CQ352E ✓ ActivoComparación de especificaciones
| Parámetro | RTAX4000DL-CQ352E | RTAX2000DL-CQ352E |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,00 | $3.360,00 |
| Manufacturer | Microchip Technology (Actel/Microsemi) | — |
| Family | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs |
| Equivalent System Gates | 4,000,000 gates | — |
| Logic Cells | 55,440 | — |
| CLBs | 36,960 | — |
| Process Technology | CMOS | — |
| Programmability | Antifuse (live-at-power-up) | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| DSP Resources | Dedicated multiply-accumulate blocks (RTAX-DSP variant) | — |
| Clocking | Segmentable clocks, chip-wide highway routing | — |
| Arithmetic Support | Carry logic | — |
| Encapsulado | CQ352 ceramic column package, 352 pins | CQFP-352 (Ceramic Quad Flat Pack) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Application Domain | Space-flight systems | Space-flight systems (radiation tolerant) |
| Radiation Tolerance | Radiation-tolerant (TID and SEE qualified per family datasheet) | — |
| Configuration | True single-chip form factor | — |
| Estado RoHS | [DATA_NEEDED: RoHS Status] | — |
| System Gates | — | 2,000,000 |
| Configurable Logic Blocks (CLBs) | — | 19,712 |
| Programmable Type | — | Antifuse (one-time programmable), live at power-up |
| Package Dimensions | — | 48 mm x 48 mm |
| Terminal Pitch | — | 0.50 mm |
| Number of Terminals | — | 352 |
| User Input Terminals | — | 166 |
| User Output Terminals | — | 166 |
| Clock Features | — | Segmentable clocks, chip-wide highway routing |
| Technology | — | Digital CMOS |
| Speed Grade | — | D (standard) |
| Temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature range] |
| Tensión de alimentación | — | [DATA_NEEDED: core supply voltage] |