RTAX4000S-LG1272V vs RTAX4000SL-LG1272V Comparación
Comparación detallada lado a lado de RTAX4000S-LG1272V por Microchip Technology y RTAX4000SL-LG1272V por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
RTAX4000S-LG1272V - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000S-LG1272V ✓ ActivoMicrochip Technology
RTAX4000SL-LG1272V - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000SL-LG1272V ✓ ActivoComparación de especificaciones
| Parámetro | RTAX4000S-LG1272V | RTAX4000SL-LG1272V |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9.600,00 | $0,00 |
| Equivalent System Gates | 4,000,000 | 4000000 |
| Logic Cells (D-Modules) | 60480 | — |
| CLBs (R-Cells) | 40320 | — |
| Logic Family | CMOS, antifuse, one-time programmable | — |
| Core Supply Voltage | 1.5 V nominal | — |
| Temperatura de funcionamiento | -55C to +125C | [DATA_NEEDED: Operating Temperature] |
| Encapsulado | LG1272 ceramic column grid array, 1272 pins | 1272-pin ceramic LG (CGA) package |
| Terminal Pitch | 1.000 mm | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| SEU Immunity | Immune to single-event upsets up to LETTH MeVcm2/mg | — |
| SEU Rate | < 10-10 errors per bit-day | — |
| SEU-Hardened Registers | Yes (eliminates need for TMR) | — |
| Configuration | Live at power-up, single-chip (no external boot device) | — |
| Radiation Tolerance | RadTolerant RTAX-S family | Radiation-tolerant, space-flight grade |
| Application Domain | Space-flight systems | Space-flight systems |
| Speed Grade | Standard (unmarked in LG1272V suffix) | — |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | — |
| Logic Cells | — | 60480 |
| CLBs | — | 40320 |
| Family | — | RTAX-S/SL and RTAX-DSP |
| Programming Technology | — | Antifuse (one-time programmable) |
| Power-Up Mode | — | Live at power-up (LAPU) |
| Form Factor | — | True single-chip |
| Embedded Memory | — | Embedded SRAM with built-in FIFO control logic |
| Clocking | — | Segmentable clocks |
| Routing | — | Chip-wide highway routing, carry logic |
| Base Architecture | — | Microsemi Axcelerator commercial family |
| Estado RoHS | — | [DATA_NEEDED: RoHS Status] |
| Core Voltage | — | [DATA_NEEDED: Core Voltage] |
| Maximum User I/O | — | [DATA_NEEDED: Maximum User I/O] |
| Embedded SRAM Bits | — | [DATA_NEEDED: Embedded SRAM Bits] |