RTAX4000SL-LG1272V vs RTAX4000S-1LG1272V Comparación
Comparación detallada lado a lado de RTAX4000SL-LG1272V por Microchip Technology y RTAX4000S-1LG1272V por Microchip Technology. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Microchip Technology
RTAX4000SL-LG1272V - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000SL-LG1272V ✓ ActivoMicrochip Technology
RTAX4000S-1LG1272V - Rad-Tolerant FPGA 4M Gates | Microchip
RTAX4000S-1LG1272V ✓ ActivoComparación de especificaciones
| Parámetro | RTAX4000SL-LG1272V | RTAX4000S-1LG1272V |
|---|---|---|
| Marca | Microchip Technology | Microchip Technology |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,00 | $9.300,00 |
| Logic Cells | 60480 | 60480 |
| CLBs | 40320 | — |
| Equivalent System Gates | 4000000 | 4,000,000 gates |
| Family | RTAX-S/SL and RTAX-DSP | RTAX-S Radiation-Tolerant FPGA |
| Programming Technology | Antifuse (one-time programmable) | — |
| Radiation Tolerance | Radiation-tolerant, space-flight grade | — |
| Power-Up Mode | Live at power-up (LAPU) | — |
| Form Factor | True single-chip | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | — |
| Clocking | Segmentable clocks | Segmentable clocks, chip-wide highway routing |
| Routing | Chip-wide highway routing, carry logic | — |
| Base Architecture | Microsemi Axcelerator commercial family | — |
| Encapsulado | 1272-pin ceramic LG (CGA) package | LG1272 (1272-ball ceramic column grid array) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Application Domain | Space-flight systems | — |
| Estado RoHS | [DATA_NEEDED: RoHS Status] | [DATA_NEEDED: RoHS Status] |
| Temperatura de funcionamiento | [DATA_NEEDED: Operating Temperature] | -55C to +125C |
| Core Voltage | [DATA_NEEDED: Core Voltage] | — |
| Maximum User I/O | [DATA_NEEDED: Maximum User I/O] | — |
| Embedded SRAM Bits | [DATA_NEEDED: Embedded SRAM Bits] | — |
| CLBs (Logic Modules) | — | 40320 |
| ASIC Gate Equivalent Option | — | 500,000 gates |
| Supply Voltage (Core) | — | 1.5 V (nominal) |
| Speed Grade | — | -1 |
| Technology | — | CMOS, anti-fuse, one-time programmable |
| Configuration | — | Live at power-up, single chip, no external boot device |
| Embedded SRAM | — | Yes, with built-in FIFO control logic |
| Screening Level | — | V (space flight qualification per datasheet flow) |
| Max I/O Count | — | [DATA_NEEDED: user I/O count for LG1272] |
| Embedded RAM Total | — | [DATA_NEEDED: total embedded SRAM bits] |