S912XDP512J1MAL vs S912XDT256F1CAL Comparación
Comparación detallada lado a lado de S912XDP512J1MAL por NXP Semiconductors y S912XDT256F1CAL por NXP Semiconductors. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
NXP Semiconductors
S912XDT256F1CAL - 16-bit S12X MCU 256KB 80MHz | NXP
S912XDT256F1CAL ✗ Fin de vidaComparación de especificaciones
| Parámetro | S912XDP512J1MAL | S912XDT256F1CAL |
|---|---|---|
| Marca | NXP Semiconductors | NXP Semiconductors |
| Categoría | Microcontrollers | Microcontrollers |
| Estado del ciclo de vida | NRND | Fin de vida |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $18,50 | $0,00 |
| Product Type | Microcontroller (MCU) | — |
| CPU Core | HCS12X (S12X) | — |
| Architecture | 16-bit CISC | CISC, upward compatible with HCS12 |
| Program Memory | 512 KB Flash | 256KB (256K x 8) Flash |
| Data Memory (RAM) | [DATA_NEEDED: RAM size in kB] | — |
| EEPROM | [DATA_NEEDED: EEPROM size in kB] | — |
| Maximum CPU Frequency | 80 MHz | — |
| Tensión de alimentación | 2.5 V / 5 V | 2.5 V / 5 V |
| Temperatura de funcionamiento | -40 C to +125 C | -40C to +85C |
| Encapsulado | 112-LQFP (20 x 20 mm) | 112-LQFP (20x20 mm) |
| Tipo de montaje | Surface Mount | Surface Mount |
| CAN Modules | msCAN x4 (per family spec) | — |
| A/D Converter | 10-bit ATD (per family spec) | — |
| Automotive Qualification | AEC-Q100 (J-grade) | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance] | unknown |
| Debug Interface | Background Debug Mode (BDM) | — |
| Core Processor | — | HCS12X (S12X core), 16-bit |
| Core Size | — | 16-bit |
| Speed | — | 80 MHz |
| RAM Size | — | [DATA_NEEDED: RAM size] |
| EEPROM Size | — | [DATA_NEEDED: EEPROM size] |
| Terminal Form | — | Gull Wing |
| Number of Terminals | — | 112 |
| Package Shape | — | Square (LQFP) |
| Qualification | — | Automotive Qualified |
| Peripherals | — | Enhanced indexed addressing, instruction queue, enhanced instruction set |
| Estado del ciclo de vida | — | End of Life (per NXP product page) |